Dual-port RAM following access method

An access method and time technology, applied in the fields of instruments, electrical digital data processing, etc., can solve problems such as slow data interaction, avoid access conflicts, improve speed, and avoid flag grabbing operations.

Active Publication Date: 2018-01-05
NUCLEAR POWER INSTITUTE OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

That is, the speed of data interaction between the existing CPU boards and expansion boards is slow, especially in the core cooling monitoring system, where there are a large number of expansion boards, how to improve the speed of data interaction between the CPU and expansion boards is worthwhile. Research

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0024] A kind of dual-port RAM following access method, comprises the following steps,

[0025] A. During the waiting period, the MCU continuously detects the state of the last written data, and when it detects that the CPU has read the last written data, it records the current time;

[0026] B. Calculate the time when the CPU reads data next time;

[0027] C. Calculate the intermediate time between the current time and the time when the CPU reads data next time, and calculate the MCU exit waiting time;

[0028] D. The expansion board prepares the data at an intermediate moment and waits for the read operation of the CPU.

[0029] The invention is a component of the core cooling monitoring system. The core cooling monitoring system is composed of CPU and different I / O expansion boards. The expansion board collects external data and sends it to the CPU, and the CPU sends commands to the expansion board after processing, as the output of the control.

[0030] Such as figur...

Embodiment 2

[0033] During the period of waiting to follow, continuously detect the sign of the dual-port RAM input area to determine whether the CPU has read the data written last time. According to the time consumed by the CPU to read data recorded in the input area mark, calculate the time when the CPU starts to read data, and add the refresh cycle of the MCU to this time to get the time for the CPU to read data next time Time, calculate the middle time according to the time when the CPU reads the data twice, and subtract the hardware operation time, you can get the time to exit and wait for the next data collection.

[0034] If it is not detected that the CPU reads the data in the input area during the waiting and following, then the MCU will jump out of following and waiting for the next data preparation after the maximum waiting time has elapsed.

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Abstract

The invention discloses a dual-port RAM following access method. The dual-port RAM following access method comprises the following steps that A, an MCU constantly detects the state of data written last time in a waiting and follow time period, and when it is detected that a CPU reads the data written last time, a current moment is recorded; B, the moment when the CPU reads data next time is calculated; C, the middle moment between the current moment and the moment when the CPU reads data next time is calculated, and the quit waiting moment of the MCU is calculated, wherein an extended board card prepares data for reading operation of the CPU at the middle moment. By adopting the method, access conflict of a dual-port RAM can be avoided, and the speed of the interaction between the CPU andthe expanded card data can be improved.

Description

technical field [0001] The invention relates to the communication field in the core cooling monitoring system, and more specifically relates to a dual-port RAM follow-up access method. Background technique [0002] Dual-port RAM is a memory that has two sets of completely independent data lines, address lines, and read-write control lines on the SRAM memory, and allows two independent systems to simultaneously access the memory randomly. At present, in the core cooling monitoring system, if see figure 1 As shown, the CPU board accesses the dual-port RAM of each expansion board through the AT96 bus to realize data interaction with the expansion board. [0003] The interaction between the existing CPU board and the expansion board is carried out by grabbing the flag bit. When the CPU side preempts the flag bit, the expansion board cannot perform the write operation, and must wait for the CPU to release the flag bit, and then execute the write operation after successfully pre...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/16
Inventor 王明星刘宏春韩文兴陈杰贺理曾少立
Owner NUCLEAR POWER INSTITUTE OF CHINA
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