I2C (Inter-Integrated Circuit) host adapter system

A host adapter and server technology, applied in the direction of detecting faulty computer hardware, etc., can solve the problems of cumbersome waste of time, not so easy to use, waste of time, etc.

Inactive Publication Date: 2018-01-16
MITAC COMP (SHUN DE) LTD +1
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, to test multiple I2C chips in a server to be tested, the user usually connects a test terminal computer to an I2C host adapter through a USB cable, and then connects the host adapter to the host adapter through the I2C bus. Multiple I2C chips in the server. Finally, the user can operate correctly by issuing some complex raw commands on the test computer. Raw commands are not only complicated, so they will be relatively difficult to use. Not so easy to use, because the UBS cable must be used, so the test site must be fixed for each test, and the USB cable needs to be plugged in every time, and it needs to be unplugged after the test, which is very cumbersome and wastes time very cumbersome and time wasting

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • I2C (Inter-Integrated Circuit) host adapter system

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0017] see figure 1 As shown, the present invention provides an I2C host adapter system, which includes: a server to be tested 1 , the I2C master control device 2 and an electronic device 3 .

[0018] The server 1 to be tested has at least one I2C chip 10, three of which are taken as an example in this embodiment.

[0019] The I2C master control device 2, which is electrically connected to a plurality of I2C chips 10 of the server to be tested 1, provides a webpage test interface 20 corresponding to the I2C chip 10, and the network test interface 20 includes at least one test button / option 200. In this embodiment, the I2C master device 2 is electrically connected to the I2C chip 10 through an I2C bus.

[0020] The electronic device 3 is connected to the I2C main control device 2 through the network, and the user controls the I2C main control device 2 to send a test command through the electronic device 3 and through the web page test interface 20. In this embodiment, After ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides an I2C (Inter-Integrated Circuit) host adapter system. The I2C host adapter system comprises a to-be-tested server, an I2C master control device and an electronic apparatus; theto-be-tested server is provided with at least one I2C chip; the I2C master control device is electrically connected with the I2C chip of the to-be-tested server, and provides a webpage testing interface corresponding to the I2C chip; the electronic apparatus is connected to the I2C master control device via a network; a user controls the I2C master control device via the electronic apparatus andthrough the webpage testing interface to send a testing instruction, such that after the I2C master control device receives the testing instruction, the testing instruction is transmitted to a designated I2C chip on the to-be-tested server and a testing result generated after the designated I2C chip executes the testing instruction is transmitted back to the electronic apparatus via the network.

Description

technical field [0001] The invention is an I2C host adapter system. Background technique [0002] I2C (Inter-Integrated Circuit) bus is a two-wire serial bus developed by PHILIPS, including data line SDA and clock line SCL, used to connect microcontrollers and their peripherals. Originally developed in the 80's for audio and video equipment, the I2C bus is used today primarily in server management, including the communication of the status of individual components. Its main advantages are its simplicity and effectiveness. Because the interface is directly on the component, the space used by the I2C bus is very small, which reduces the space of the circuit board and the number of chip pins, and reduces the cost of interconnection. Another advantage is that it supports multi-master, where any device capable of sending and receiving can become a master. A master can control the transmission of signals and clock frequency. Nowadays, the I2C communication method is used more ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
Inventor 顏啟原
Owner MITAC COMP (SHUN DE) LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products