9 results about "Host adapter" patented technology

Technologies are disclosed for enabling virtual private network (VPN) support in a virtualized environment. The presence or creation of a host VPN adapter on a host processing system providing a virtualized environment is detected and, in response thereto, a virtual network adapter is created in the virtualized environment. A guest operating system (OS) creates a guest VPN adapter in the virtualized environment. A software component is inserted between the guest VPN adapter and the virtual network adapter. The software component adds Ethernet frames to point-to-point protocol (PPP) packets received from the guest VPN adapter and removes Ethernet frames from packets received from the virtual network adapter.

Disclosed is a Unified Devices Architecture (UDA) system that provides for rapid development of device applications used across an industrial automation ecosystem that delivers common experiences through reuseable device application services. The UDA system allows a developer to select any number of device application services, which are specific to devices or host applications, to create a device application that is specific to an industrial automation device and a host application. In use, a host adapter allows the host application to dynamically select the correct device application for performing requested services.

Disclosed is a Unified Devices Architecture (UDA) system that provides for rapid development of device applications used across an industrial automation ecosystem that delivers common experiences through reuseable device application services. The UDA system allows a developer to select any number of device application services, which are specific to devices or host applications, to create a device application that is specific to an industrial automation device and a host application. In use, a host adapter allows the host application to dynamically select the correct device application for performing requested services.

Storage systems and methods to provide high-density data storage. Freestanding storage servers include storage drives, left and right backplanes, a backing plate, host adapters, and cables. The left and right backplanes are secured to the backing plate. The mounting holes of each storage drive attached to the left backplane are bilaterally symmetrical about a median plane to the corresponding mounting holes of each storage drive attached to the right backplane. Each left and right backplane has plug receptacles which are aligned and coupled to cables. The plug receptacles of the left backplane are bilaterally symmetrical about the median plane to corresponding plug receptacles of the right backplane. Host adapters are aligned, and each has plug receptacles, organized into a left and a right connector group, which are coupled to cables. For each host adapter, the left connector group is bilaterally symmetrical about the median plane to the right connector group.

The application relates to a simulation scheduling method and a simulation scheduling device for a software simulation platform. Based on the application, the software simulation platform can comprise a platform interface, a host adapter simulation module and an HBM simulation module corresponding to a bus interface of an integrated circuit chip, a host adapter and an HBM in sequence. For continuous multiple host write requests received by the platform interface, if the addresses of the multiple write data are continuous, the multiple write data are aggregated in one on-chip write request by the host adapter simulation module, and are transferred to the HBM simulation module at one time, so that even if the host driver is limited to the fixed receiving bandwidth of the platform interface, the data to be written into the integrated circuit chip is split into multiple write data of smaller granularity, the host adapter simulation module can also avoid the increase of the data transfer times between multiple software modules of the software simulation platform through the aggregation of the multiple write data, and the software simulation efficiency on the integrated circuit chip is improved.

This invention discloses a cross-environment camera sharing method based on hardware access slicing. Upon host startup, the method initializes a permission verification module, creates a first shared memory pool, and initiates a conflict arbiter to establish a concurrent request scheduling mechanism. The hardware capability slicing module detects hardware information and splits management logic slices. The host adapter adapts and distributes capability information. After container startup, a permission proxy module is deployed to uniformly forward permission requests to the host verification module. The container adapter completes shared memory mapping, connects to the conflict arbiter, and adapts to the hardware capability format of the container environment. After application startup, camera permission verification is completed, a unified hardware capability configuration is queried to build business data flow configuration, and a resource access request is initiated. The hardware capability slicing module allocates logical slices, determines the hardware baseline configuration to start the camera, binds the slices to shared memory, and enters the acquisition phase after the slices are distributed. Control commands are executed after being adjudicated by the arbiter, achieving multi-application collaborative sharing of cameras.

The utility model discloses an intercom host adapter plate circuit of internet of things, include: core control chip U2, adopt ML160 chip, be used for realizing the core control and communication function of equipment, host docking interface circuit is linked with core control chip U2, be used for with host mainboard transmission audio signal and serial communication, and power connection, mobile phone card circuit is linked with core control chip U2, be used for providing power, clock, reset and the condition of data transmission for USIM card, realizes the data interaction with external equipment. Core control chip U2 adopts ML160 chip, integrates 3G, 4G network communication function, breaks through the limitation that traditional intercom system only supports 2G network. Effectively solved the problem that equipment can not be used because of 2G base station is closed, expands network coverage, ensures that can stable communication under different scenes, adapts to the network upgrading demand of all places.

Embodiments herein allow for endpoints, such as a storage array or a host system, to obtain the speed of a corresponding endpoint that is connected to a port or ports of the endpoint. Given port speeds, an endpoint system may adjust the bandwidth of a payload being sent to the corresponding endpoint system to match the connected port's speed. For example, limiting the data being sent from a storage endpoint system to a host endpoint system in cases where the storage array's port is faster than the host adapter helps mitigate or even ensure that the host adapter of the host endpoint system is not overloaded—thereby avoiding congestion. In one or more embodiments, a centralized discovery controller (CDC) may be enhanced to obtain the current operating speed of a port of an endpoint system.

The invention relates to a simulation scheduling method and a simulation scheduling device for a software simulation platform. Based on the application, the software simulation platform can comprise a platform interface, a host adapter simulation module and an HBM simulation module which sequentially correspond to a bus interface, a host adapter and an HBM of the integrated circuit chip. For continuous multiple host write requests received by the platform interface, if the addresses of the corresponding multiple write data are continuous, the multiple write data are aggregated in one on-chip write request by the host adapter simulation module and transferred to the HBM simulation module at one time, so that even if a host drive is limited by the solidified receiving bandwidth of the platform interface, the host drive is not limited by the solidified receiving bandwidth of the platform interface, the on-chip write request is not limited by the on-chip write request, and the on-chip write request is not limited by the on-chip write request. According to the method, the data to be written into the integrated circuit chip is split into the multi-write data with small granularity, the host adapter simulation module can also avoid the increase of data transfer times among a plurality of software modules of the software simulation platform by aggregating the multi-write data, and then the software simulation efficiency of the integrated circuit chip is improved.