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A method for fabricating memory by self-aligned photolithography

A technology of photolithography corrosion and self-alignment, which is applied in the direction of static memory, digital memory information, information storage, etc., to reduce the size of the unit area, reduce the cost, and solve the effects of damage and cracking

Active Publication Date: 2021-08-06
CETHIK GRP +1
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  • Abstract
  • Description
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  • Application Information

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Problems solved by technology

[0018] The purpose of the present invention is to provide a method for producing memory by self-aligned photolithography, which solves the technical problems caused by the production process that must be completed by multi-layer overlay, because buffering and sacrificial oxidation are added in the middle layer, which protects the MgO layer in the middle of the MTJ from damage by CMP, greatly improving the quality and reliability of the device

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  • A method for fabricating memory by self-aligned photolithography
  • A method for fabricating memory by self-aligned photolithography
  • A method for fabricating memory by self-aligned photolithography

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Embodiment Construction

[0046] The technical solution of the present invention will be described in further detail below in conjunction with the accompanying drawings and embodiments, and the following embodiments do not constitute a limitation of the present invention.

[0047] In this embodiment, a method for fabricating memory by self-aligned photolithography, such as figure 1 shown, including the following steps:

[0048] Step 1. On the substrate, deposit a lower electrode, an MTJ, a barrier layer, a sacrificial oxide layer, and an upper electrode in sequence.

[0049] The substrate of the MRAM can be made of metal, glass, silicon, or metal alloy, and this embodiment uses metal as an example for illustration. The magnetic tunnel junction MTJ in the magnetic storage unit in the magnetic random access memory MRAM is usually inserted between two metal layers of a CMOS integrated circuit, and the two metal layers are connected through metal vias. Such as figure 2 As shown, the metal layer Mn surr...

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Abstract

The invention discloses a method for making a memory by self-aligned photolithography etching. Firstly, a lower electrode, an MTJ layer and a barrier layer are deposited and grown on a metal layer, and then a sacrificial oxide layer and an upper electrode are continuously deposited, followed by MTJ Photolithography, and etching, after etching, deposit a protective layer sidewall for protection, and then etch to leave a certain thickness of the sidewall, and then use the sidewall to perform the most alignment of the hard mask, and etch the lower electrode After etching, the oxide layer is filled, followed by photolithography development and etching of the sacrificial oxide layer, and then the metal via filling process is performed, and then CMP chemical mechanical polishing is performed. The method of the invention greatly reduces the cost and greatly improves the quality and reliability of the device.

Description

technical field [0001] The invention belongs to the technical field of semiconductor manufacturing, and in particular relates to a method for making memory by self-alignment photolithography etching. Background technique [0002] It has become a trend that semiconductor devices are getting smaller and smaller in size and lower in cost. Traditional magnetic tunnel junction random access memory (MRAM) devices are limited by the size of the metal. Although the characteristic size of the unit memory (PMRAM) can be made 60nm or even smaller, the size of the unit cannot be achieved due to the limitation of the metal size. Continue to become smaller, which greatly limits the development of high-density MRAM memory. [0003] The traditional manufacturing process of MRAM includes the following steps: [0004] 1) Deposition and etching of the lower electrode TaN; [0005] 2), oxide layer deposition; [0006] 3), lower electrode CMP chemical mechanical light; [0007] 4), MTJ magn...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L43/12H01L27/22G11C11/02H10N50/01
CPCG11C11/02H10B61/00H10N50/01
Inventor 刘少鹏孟皓刘波李辉辉
Owner CETHIK GRP