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An on-board time management system based on fpga and cpu integrated control

A technology of time management and comprehensive control, which is applied in the field of time management on satellites, can solve the problems of CPU occupation, failure to meet the requirements of time synchronization, resource shortage, etc., to improve the accuracy of time calibration, realize effective management, and meet the requirements of time synchronization Effect

Active Publication Date: 2021-04-06
SHANDONG INST OF AEROSPACE ELECTRONICS TECH
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  • Abstract
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Problems solved by technology

Its shortcomings are also obvious. First, it takes up CPU resources. In the case of limited CPU resources, it is easy to cause resource shortage or even fail to meet the system requirements. Second, due to the existence of other tasks of the CPU, the response of the time management system is affected by other tasks of the CPU. In severe cases, it cannot meet the requirements of the system; thirdly, due to the shortening of the mission cycle of the satellite management system, relying solely on the standard timing pulse output by the time management system cannot meet the task time synchronization of the satellite management system. requirements

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  • An on-board time management system based on fpga and cpu integrated control

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Embodiment Construction

[0044] The present invention will be described in detail below with reference to the accompanying drawings and examples.

[0045] figure 1 It shows a block diagram of the composition and structure of the on-board time management system based on FPGA and CPU integrated control provided by the embodiment of the present invention.

[0046] The embodiment of the present invention provides an onboard time management system based on integrated control of FPGA and CPU.

[0047] The system system includes a field programmable gate array FPGA chip and a central processing unit CPU chip.

[0048] The FPGA chip is integrated with an internal interactive interface module, a timing module, a timing module, a timing module and an external output interface module.

[0049]The internal interactive interface module is connected to the CPU chip through the communication bus; refer to figure 1 In the line (1), the line (1) is a communication path between the CPU chip and the FPGA, which can b...

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Abstract

The invention discloses an on-board time management system based on integrated control of FPGA and CPU, which can perform comprehensive on-board time management, has high resource utilization rate, high precision and meets the requirements of on-board mission time synchronization. The technical scheme of the present invention is: an on-board time management system based on integrated control of FPGA and CPU, including an FPGA chip and a CPU chip. The following modules are integrated in the FPGA chip: an internal interactive interface module connected to the CPU chip. The timing module performs timing according to the timing control signal sent by the CPU chip, and corrects the timing result of the timing module. The timing module stores the timing result and sends it to the CPU chip; the timing module outputs the standard timing pulse generated in the FPGA chip through the external output interface module. The timing module stores the timing result; the timing module receives the ground timing instruction sent by the CPU chip and corrects the timing result of the timing module. The external output interface module is connected to the external equipment receiving time service.

Description

technical field [0001] The invention relates to the technical field of satellite on-board time management, in particular to an on-board time management system based on integrated control of FPGA and CPU. Background technique [0002] The satellite whole-satellite time maintenance system includes functions such as whole-satellite timekeeping, time service, and time correction. In order to save hardware resources, a common implementation method is to use only the CPU and use software for management and implementation. The advantage of this method is that it saves hardware overhead and does not require additional hardware resources. Its shortcomings are also obvious. First, it takes up CPU resources. In the case of limited CPU resources, it is easy to cause resource shortage or even fail to meet system requirements; second, due to the existence of other tasks of the CPU, the response of the time management system is affected by other tasks of the CPU. In severe cases, it cann...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G04R20/04G06F9/48G06F9/50
CPCG04R20/04G06F9/4812G06F9/5027
Inventor 王德波栾晓娜林景明张鹏王明贺
Owner SHANDONG INST OF AEROSPACE ELECTRONICS TECH