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A memory fault-tolerant protection method, device, equipment and storage medium

A memory and storage technology, applied in the computer field, can solve problems such as large hardware overhead and time delay, error detection and correction efficiency, and slow memory data reading speed, so as to achieve the effect of optimizing data and reducing the probability of errors

Active Publication Date: 2021-07-16
SHENZHEN INST OF ADVANCED TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The object of the present invention is to provide a memory fault-tolerant protection method, device, device and storage medium, aiming to solve the problem of memory data reading speed due to the excessive hardware overhead and time delay in the prior art, and the low efficiency of error detection and correction. slower problem

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  • A memory fault-tolerant protection method, device, equipment and storage medium
  • A memory fault-tolerant protection method, device, equipment and storage medium
  • A memory fault-tolerant protection method, device, equipment and storage medium

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Embodiment 1

[0026] figure 1 It shows the implementation process of the memory fault-tolerant protection method provided by Embodiment 1 of the present invention. For the convenience of description, only the parts related to the embodiment of the present invention are shown, and the details are as follows:

[0027] In step S101 , when a data write request is received, the stored data requested to be written into the storage is obtained, odd / even check encoding is performed on the stored data, and all first parity bits of the stored data are obtained.

[0028] The embodiments of the present invention are suitable for storage, especially for readable and writable storage, so as to facilitate storage fault tolerance protection. In the embodiment of the present invention, when receiving a user's data writing request, first obtain the matrix corresponding to the storage data requested to be written into the storage, and then perform odd / even-check encoding on the storage data according to the m...

Embodiment 2

[0038] figure 2 It shows the implementation process of the memory fault-tolerant protection method provided by the second embodiment of the present invention. For the convenience of description, only the parts related to the embodiment of the present invention are shown, and the details are as follows:

[0039] In step S201, when a data write request is received, the stored data requested to be written into the storage is obtained, and the odd / even check code is performed on the stored data to obtain all the first parity bits of the stored data.

[0040] The embodiments of the present invention are suitable for storage, especially for readable and writable storage, so as to facilitate storage fault tolerance protection. In the embodiment of the present invention, when receiving a user's data writing request, first obtain the matrix corresponding to the storage data requested to be written into the storage, and then perform odd / even-check encoding on the storage data according...

Embodiment 3

[0060] image 3 The structure of the memory fault-tolerant protection device provided by the third embodiment of the present invention is shown. For the convenience of description, only the parts related to the embodiment of the present invention are shown, including:

[0061] The first encoding unit 31 is configured to obtain the storage data requested to be written into the storage when receiving a data write request, perform odd / even-check encoding on the storage data, and obtain all first parity bits of the storage data.

[0062] In the embodiment of the present invention, when a data write request from the user is received, the first encoding unit 31 first obtains the matrix corresponding to the storage data requested to be written into the storage, and then performs an odd / even check on the storage data according to the matrix Encoding (the data on each row and column of the matrix corresponds to a parity bit), and all the first parity bits of the stored data are obtaine...

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Abstract

The present invention is applicable to the field of computer technology, and provides a memory fault-tolerant protection method, device, device, and storage medium. The method includes: when a data writing request is received, acquiring the storage data that is requested to be written into the storage, and performing Odd / even check coding, get all the parity bits of the stored data, use the principal component analysis method to reduce the dimensionality of the stored data, get the dimensionality-reduced data corresponding to the stored data, store the data, all the parity bits and After dimensionality reduction, the data is written into the storage, thereby optimizing the data written into the storage, thereby reducing the probability of errors when reading data from the storage.

Description

technical field [0001] The invention belongs to the technical field of computers, and in particular relates to a memory fault-tolerant protection method, device, equipment and storage medium. Background technique [0002] The memory controller is one of the core components in the embedded system. The program run by the processor and the calculation data required by the program are all obtained from the memory by requesting the memory controller. The fault tolerance of the memory determines the embedded system to a certain extent. The application range of the system is critical to the reliability of the processor. [0003] For Single Event Upset (SEU for short), in addition to physical defense and circuit-based reinforcement, Triple Modular Redundancy (TMR) and Error Correcting Code (ECC for short) ) are the two most commonly used methods. TMR technology saves the same information in three physical storage spaces, compares the three contents when reading, and takes two cons...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10
CPCG06F11/1032
Inventor 邵翠萍李慧云王峥
Owner SHENZHEN INST OF ADVANCED TECH