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Memory device and method of operation thereof

A technology of memory, memory cells, used in the field of semiconductors

Active Publication Date: 2020-10-16
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Aiming at the problem of improving the energy consumption of memory devices in the related art, the present invention proposes a memory device and its operating method, so that the memory device can reuse charges during read operations to reduce energy consumption

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  • Memory device and method of operation thereof
  • Memory device and method of operation thereof
  • Memory device and method of operation thereof

Examples

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Embodiment Construction

[0020] The following disclosure provides many different embodiments or examples for implementing different features of the presented subject matter. Specific examples of components, values, operations, materials, arrangements, etc. are described below to simplify the present disclosure. Of course, these are examples only and are not intended to limit the invention. Other components, values, operations, materials, arrangements, etc. are contemplated. For example, in the following description, forming a first component over or on a second component may include an embodiment in which the first component and the second component are formed in direct contact, and may also include an embodiment in which the first component and the second component are formed in direct contact. An embodiment in which an additional part is formed in between so that the first part and the second part may not be in direct contact. In addition, the present invention may repeat reference numerals and / or...

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Abstract

A semiconductor device comprising: a sense amplifier; a branch line selectively connected to the sense amplifier; a circular arrangement selectively connected to the branch line; an array of bit lines connected to corresponding memory cells; Corresponding lines in the line array selectively connect the stubs to a selected one of the memory cells; and a controller. The controller is configured to: allow a flow of charge (charge flow) between the loop arrangement and the spur during a recovery phase in which a large amount of collected charge (collected charge) is recovered; during a discharge phase in which the collected charge is preserved, Interrupting charge flow between the recycling arrangement and the spurs; allowing charge flow between the recycling arrangement and the spurs during a reuse phase in which collected charges are reused. The invention also provides a method of operating the semiconductor device.

Description

technical field [0001] Embodiments of the present invention generally relate to the field of semiconductor technologies, and more particularly, to memory devices and methods of operating the same. Background technique [0002] The memory device comprises: an array of memory cells (which are programmable) and corresponding arrays of reference memory cells ('inverted memory cells'); sense amplifiers; first and second legs connected to corresponding first and second input terminals; and an arrangement of bit lines and bit lines (also called inversion bit lines), which are controllable to selectively connect one of the memory cells with the inversion memory cell (memory- A corresponding one of bar cells, also known as a memory cell bar, is connected to the first branch line and the second branch line. [0003] The read operation of the sense amplifier consists of three modes (listed in order of occurrence): precharge mode; evaluation mode; and discharge mode. In the precharge ...

Claims

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Application Information

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IPC IPC(8): G11C7/08G11C7/12G11C7/18
CPCG11C7/08G11C7/12G11C7/18G11C7/062G11C2207/06G11C7/06G11C7/1051G11C5/063G11C7/10
Inventor 于鸿昌叶大庆
Owner TAIWAN SEMICON MFG CO LTD
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