A metal interconnection structure with a porous dielectric layer

A technology of metal interconnection structure and porous dielectric layer, which is applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., can solve the problem of reducing the reliability of materials, the effect of interconnection structure is not very ideal, through holes or grooves Shape changes and other issues, to achieve fast and accurate etching effect

Active Publication Date: 2020-06-23
南京阿斯特液压件有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the use of low-K or ultra-low-K insulating dielectric materials poses new requirements for semiconductor manufacturing processes. On the one hand, in order to obtain low-K materials or ultra-low-K materials and reduce the K value of materials, the materials usually used are porous materials. However, the mechanical strength of porous materials is relatively low, which leads to easy damage to the insulating dielectric layer during the process of etching through holes or trenches. On the other hand, the porous insulating dielectric layer is easily infiltrated by external materials, causing pollution , reducing the reliability of the material
Existing academic studies have pointed out that the "open" pore structure exposed to the outside when etching the porous dielectric layer can be formed into a closed structure through an additional "plugging" process, so as to prevent metal impurities from easily forming an interconnection structure. However, the additional process not only increases the cost, but also easily changes the shape of the through hole or trench formed by etching, resulting in a less than ideal effect of the final interconnection structure; and usually Next, there are other interconnection structures under the through holes or trenches formed in the interlayer dielectric layer. During etching, it is easy to cause damage to the underlying interconnection structure. At the same time, filling the through holes or trenches During the deposition or heat treatment step, the stress induced between the metal (usually copper) and the underlying interconnection layer is prone to peeling off, making the gap between the metal filled in the via or trench and the underlying interconnection line Poor contact, these will have a great impact on the stability and reliability of semiconductor devices
[0005] At the same time, after forming a metal interconnection structure (usually copper metal), in order to enhance the electromigration characteristics, it has been proved that the Cu / metal interface can replace the Cu / dielectric interface to improve the electromigration characteristics by more than 100%, and the material of the metal cap layer usually selected It is a Co-containing metal (such as CoWP), but in the cleaning step after the subsequent formation of the interconnect structure, dilute hydrofluoric acid is usually used, which will corrode the Co metal and cause device performance degradation

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  • A metal interconnection structure with a porous dielectric layer
  • A metal interconnection structure with a porous dielectric layer
  • A metal interconnection structure with a porous dielectric layer

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Embodiment Construction

[0026] In the following description, the method for preparing the semiconductor interconnection structure proposed by the present invention will be further described in detail with reference to the accompanying drawings and examples, in order to provide a more thorough understanding of the present invention through specific details. It should be noted that all the drawings are in a very simplified form and use imprecise scales, and are only used to facilitate and clearly assist the purpose of illustrating the embodiments of the present invention. In the embodiments, in order to avoid confusion with the present invention, some technical features known in the art are not described.

[0027] Please refer to the attached figure 1 The metal interconnection structure of the present invention shown includes an interconnection structure 2 located in the lower dielectric layer 1 . A base substrate structure may also be included under the lower dielectric layer 1. The base substrate st...

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Abstract

The invention provides a metal interconnection structure having a porous dielectric layer. The metal interconnection structure is characterized in that a through hole structure is formed in a porous dielectric layer; and the edge part of the through hole is lower than the upper surface of an interconnection line in a lower dielectric layer. A first groove structure is formed around the interconnection line in the lower dielectric layer. The through hole structure in the porous dielectric layer is formed by etching by using femtosecond laser. During the etching process, the exposed hole structure in the porous dielectric layer is melted partially to seal the exposed hole structure. A metal interconnecting structure is formed in the through hole structure and is in contact with the upper surface and the part of side surface of the interconnection line; and a sealing layer is formed above the metal interconnecting structure and has one part arranged at the top surface of the metal interconnecting structure and one part arranged in a second groove structure around the top surface below the top surface.

Description

technical field [0001] The invention relates to a semiconductor interconnection structure, in particular to a semiconductor interconnection structure with a porous low-K or ultra-low-K interlayer dielectric layer. Background technique [0002] The rapid development of semiconductor integrated circuit technology constantly puts forward new requirements for the development of interconnection technology. At present, in the back-end process of semiconductor manufacturing, in order to connect the integrated circuits composed of various components, metal materials with relatively high conductivity are usually used, but as the size of semiconductor devices continues to shrink, the interconnection structure becomes narrower and narrower. , resulting in higher and higher interconnect resistances. With the help of copper's excellent electrical conductivity, copper interconnection technology has been widely used in the technology of 90nm and 65nm technology nodes. [0003] In the exi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/532H01L21/768H01L21/311
CPCH01L21/31127H01L21/7682H01L23/53238H01L23/5329H01L2221/1047
Inventor 赵红英
Owner 南京阿斯特液压件有限公司
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