Awaking method and device of FPGA (Field Programmable Gate Array) chip

Abstract

The invention provides an awaking circuit and method of an FPGA (Field Programmable Gate Array) chip for realizing an effect that the FPGA chip in a standby state can be awoken by an external input signal. The circuit includes: a microprocessor, an external interface, a system power supply and the FPGA chip. The external interface is configured for outputting an external access signal from an external signal source to the microprocessor. The microprocessor is configured for detecting whether the external input signal meets an awaking condition; and outputting a power supply signal to the system power supply when the external input signal meeting the awaking condition is detected. The system power supply is configured for receiving and responding to the power supply signal from the microprocessor, and supplying power to the FPGA chip to awake the FPGA chip.

Description

technical field [0001] The invention relates to the field of field programmable gate array (FPGA, Field Programmable Gate Array) design, in particular to a method and device for waking up an FPGA chip. Background technique [0002] FPGA chips, that is, field programmable gate array chips, are used in programmable array logic (PAL, Programmable Array Logic), general array logic (GAL, Generic Array Logic), complex programmable logic devices (CPLD, Complex Programmable Logic Device), etc. The product of further development on the basis of programmable devices. It emerged as a semi-custom circuit in the field of ASIC (Application Specific Integrated Circuit), which not only solves the shortcomings of custom circuits, but also overcomes the shortcomings of the limited number of original programmable device gates. [0003] At present, during the use of FPGA chips, since they are used in large-scale integrated circuits, and the power supply for them is the whole system power suppl...

AI Technical Summary

Problems solved by technology

[0003] At present, during the use of FPGA chips, because they are used in large-scale integrated circuits, and the power supply for them is the whole system power supply, so when standby is required, the entire system is usually powered off, and in this case In this case, when the standby state needs to be released, or the external signal with the FPGA interface is hot-swapped, the FPGA chip cannot process it.

[0004] Therefore, there is a technical problem in the prior art that the FPGA chip cannot be woken up from standby

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