Light emitting diode epitaxial wafer and manufacturing method thereof

A technology of light-emitting diodes and manufacturing methods, which is applied to electrical components, circuits, semiconductor devices, etc., can solve the problems of low internal quantum luminous efficiency and external quantum luminous efficiency of LEDs, reduce polarization and stress, reduce thickness, The effect of improving the internal quantum luminous efficiency

Active Publication Date: 2018-08-28
HC SEMITEK SUZHOU
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] In order to solve the problem of low internal quantum luminous efficiency and external quantum luminous efficiency of LEDs i...

Method used

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  • Light emitting diode epitaxial wafer and manufacturing method thereof
  • Light emitting diode epitaxial wafer and manufacturing method thereof

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Embodiment 1

[0027] An embodiment of the present invention provides a light emitting diode, figure 1 It is a schematic structural diagram of a light-emitting diode epitaxial wafer provided by an embodiment of the present invention, as shown in figure 1 As shown, the light-emitting diode includes a substrate 1, a buffer layer 2, an undoped GaN layer 3, an N-type layer 4, a multi-quantum well layer 5, an insertion layer 6, and a low-temperature P-type layer stacked on the substrate 1 in sequence. layer 7, electron blocking layer 8, high temperature P-type layer 9, and P-type contact layer 10.

[0028] The low-temperature P-type layer 7 is a Mg-doped AlGaN / GaN superlattice structure or a Mg-doped AlGaN / InGaN superlattice structure, and the doping concentration of Mg in the low-temperature P-type layer 7 is greater than or equal to 1*10 20 cm -3 . The insertion layer 6 is an AlN layer, and the total thickness of the insertion layer 6 , the low-temperature P-type layer 7 , the electron block...

Embodiment 2

[0044] An embodiment of the present invention provides a method for manufacturing a light-emitting diode epitaxial wafer, which is suitable for the light-emitting diode epitaxial wafer provided in Embodiment 1. figure 2 It is a method flowchart of a method for manufacturing a light-emitting diode epitaxial wafer provided by an embodiment of the present invention, as shown in figure 2 As shown, the manufacturing method includes:

[0045] Step 201, performing pretreatment on the substrate.

[0046] Optionally, the substrate is sapphire with a thickness of 630-650um.

[0047] In this embodiment, Veeco K465i or C4MOCVD (Metal Organic Chemical VaporDeposition, metal organic compound chemical vapor deposition) equipment is used to realize the LED growth method. Using high-purity H 2 (hydrogen) or high-purity N 2 (nitrogen) or high purity H 2 and high purity N 2 The mixed gas as the carrier gas, high-purity NH 3 As the N source, trimethylgallium (TMGa) and triethylgallium (T...

Embodiment 3

[0079] An embodiment of the present invention provides a method for manufacturing a light-emitting diode epitaxial wafer. The manufacturing method provided in this embodiment is basically the same as that in Embodiment 2, except that in this embodiment, the low-temperature P-type layer It is an AlGaN / InGaN superlattice structure, the period number of the AlGaN / InGaN superlattice structure is 6, and the thickness is 21.6nm.

[0080] Specifically, when growing the AlGaN / InGaN superlattice structure of each period, it includes:

[0081] An AlGaN sublayer with a thickness of 1.8nm is grown for 30s, and an InGaN sublayer with a thickness of 1.8nm is grown for 30s.

[0082] The growth conditions of the AlGaN / InGaN superlattice structure are the same as the growth conditions of the AlGaN / GaN superlattice structure in Embodiment 2, and the present invention will not repeat them here.

[0083] After the growth of the light-emitting diode epitaxial wafer is finished, the temperature of...

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Abstract

The invention discloses a light emitting diode epitaxial wafer and a manufacturing method thereof, and belongs to the technical field of semiconductors. The epitaxial wafer comprises an insertion layer, a low-temperature P-type layer, an electron blocking layer, a high-temperature P-type layer and a P-type contact layer which are sequentially stacked on a multi-quantum well layer; the insertion layer is an AlN layer, the low-temperature P-type layer is a Mg-doped AlGaN/GaN superlattice structure or Mg-doped AlGaN/InGaN superlattice structure, the AlN layer is matched with the low-temperature P-type layer, the effect of a part of the electron blocking layer can be shared, and the thickness of the electron blocking layer can be reduced, so that the blocking effect on the hole is reduced, andmore holes can emit light by combining with electrons on the multi-quantum well layer, and the internal quantum light-emitting efficiency of the LED is improved. The total thickness of the insertionlayer, the low-temperature P-type layer, the electron blocking layer, the high-temperature P-type layer and the P-type contact layer is 40-100 nm, the thickness of the P-type layer is reduced, and theexternal quantum light-emitting efficiency of the LED is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer and a manufacturing method thereof. Background technique [0002] LED (Light Emitting Diode, Light Emitting Diode) is a semiconductor electronic component that can emit light. As an efficient, environmentally friendly and green new solid-state lighting source, it is being rapidly and widely used, such as traffic lights, car interior and exterior lights, urban landscape lighting, mobile phone backlights, etc. [0003] The epitaxial wafer is the main component of the LED. The existing GaN-based LED epitaxial wafer includes a substrate and a GaN-based epitaxial layer arranged on the substrate. The GaN-based epitaxial layer includes a buffer layer stacked on the substrate, an undoped Doped GaN layer, N-type layer, multiple quantum well layer, insertion layer, low-temperature P-type layer, electron blocking layer, high-temperature P-type ...

Claims

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Application Information

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IPC IPC(8): H01L33/04H01L33/06H01L33/12H01L33/14H01L33/00
Inventor 苏晨王慧肖扬吕蒙普胡加辉李鹏
Owner HC SEMITEK SUZHOU
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