Method for forming an air gap between metal wiring lines and a metal wiring structure

Abstract

The invention provides a method for forming an air gap between metal wiring lines and a metal wiring structure. The method comprises the following steps: providing a metal interlayer dielectric layer;forming a metal layer on the interlayer dielectric layer; etching the metal layer to form a plurality of metal lines spaced apart from each other; a metal interlay dielectric layer is etched to forma trench, the depth of the trench is smaller than the thickness of the metal interlayer dielectric layer, a metal layer is sequentially covered with a silicon-rich oxide, a plasma-enhanced tetraethylorthosilicate and fluorine-doped silica or a plasma-enhanced tetraethylorthosilicate and non-fluorine-doped silica to form an interconnected dielectric lay and an air gap between the metal lines. The invention can improve the filling appearance of the side wall of the metal connection and avoid the short circuit phenomenon between the metal connections.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming an air gap between metal wirings and a metal wiring structure. Background technique [0002] In the technical field of manufacturing semiconductor devices, the parasitic capacitance between metal wirings is not only determined by the metal spacing, metal thickness and wiring width, but also affected by the dielectric constant of the medium between the metal wirings. The dielectric material filled after the metal etch is usually silicon dioxide with a dielectric constant between 3.2-4.0. With the advancement of process nodes, the line width and spacing of metal connections are getting smaller and smaller, and the parasitic capacitance between metal connections is also increasing, and the impact on circuit performance is also increasing. However, the thickness of the metal wires and the minimum distance between the wires are limited by the ...

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Problems solved by technology

However, when the process node is below 0.20 microns, such as 0.13 microns, when the metal wiring pitch is less than 0.25 microns, the thickness of the SRO and FSG at the sidewall of the metal wiring is thinner, especially at the position where the bottom edge of the metal wiring is insufficiently covered, and There are still cracks in the corner edge profile of the side wall of the metal connection, such as figure 2 The narrow and long slit-like lines at the junction of the hollow air gap and the corner edge of the side wall of the metal connection are cracks, please refer to Figure 2 to Figure 4 , the crack will cause the fluorine (F) in the FSG to penetrate along the crack to the vicinity of the metal connection aluminum, and then contact with the aluminum (Al) to undergo a chemical reaction, causing the reaction product 70 of Al and F to flow into the air gap 60, This results in a short circuit between the metal wires on both sides of the air gap

That is to say, in the process below 0.20 microns, the critical dimension of the metal wiring becomes smaller, and the space between the metal wiring also becomes smaller. When SRO and FSG are used as trench filling materials, not only The filling effect of the silicon dioxide covered by the sidewall of the small-pitch metal wiring is not good, which affects the morphology of the sidewall structure of the metal wiring, and also causes a short circuit between the small-pitch metal wiring

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