Method and device for managing off-chip memory, and computer-readable storage medium

A technology of off-chip memory and management method, applied in the field of off-chip memory management method and device, and computer-readable storage media, can solve problems such as waste of storage bandwidth and increased design cost, and achieve bandwidth utilization and chip saving. The effect of external cache cost

Active Publication Date: 2022-04-22
SANECHIPS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, for off-chip memory, storage bandwidth utilization is a very important factor. Using traditional cache management methods will cause waste of storage bandwidth and increase design costs.

Method used

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  • Method and device for managing off-chip memory, and computer-readable storage medium
  • Method and device for managing off-chip memory, and computer-readable storage medium
  • Method and device for managing off-chip memory, and computer-readable storage medium

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Embodiment Construction

[0040] In order to make the purpose, technical solution and advantages of the present invention more clear, the embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined arbitrarily with each other.

[0041] Such as figure 1 Shown, according to the management method of a kind of off-chip memory of the present invention, comprise:

[0042] Step 101: According to the storage capacity and storage bandwidth of the off-chip memory and the storage capacity and storage bandwidth required by each user program, the off-chip memory is divided into several storage spaces corresponding to each user program, and the several storage spaces are respectively Assigned to individual user programs;

[0043] It should be noted that the storage capacity mentioned in the present invention ref...

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PUM

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Abstract

The invention discloses a management method and device of an off-chip memory, and a computer-readable storage medium, comprising: dividing the off-chip memory according to the storage capacity and storage bandwidth of the off-chip memory and the storage capacity and storage bandwidth required by each user program Create several storage spaces corresponding to each user program, and allocate several storage spaces to each user program; configure the read-write side scheduling strategy; receive write or read commands from user programs, and read and write according to the configuration The side scheduling policy and the allocated storage space schedule the data packets of the user program, write the data packets of the user program into the corresponding storage space or read the data packets from the corresponding storage space. The invention effectively ensures the storage space and storage bandwidth utilization rate of the off-chip memory, and reduces the use cost of the off-chip memory.

Description

technical field [0001] The present invention relates to the field of communication technology, in particular to a method and device for managing an off-chip memory, and a computer-readable storage medium. Background technique [0002] With the rapid development of the Internet, people continue to put forward new service requirements for the network, and the limited on-chip memory resources cannot meet the increasing needs of user programs. At present, network service providers tend to use large-capacity off-chip memory to store messages and data, and double-rate (Double Data Rate SDRAM, DDR SDRAM) memory is used as the main off-chip memory, which is a high-performance, low-cost storage The solution has been widely used in PC (Personal Computer), server and today's system on chip (System On Chip, SOC) design. [0003] In the use of existing off-chip storage devices, usually as many groups of storage devices are used as there are sources. However, the capacity of the off-chi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/48G06F3/06G06F13/16G06F13/366G06F15/78
CPCG06F3/0608G06F3/0623G06F3/0644G06F9/4881G06F13/1678G06F13/366G06F15/781
Inventor 宋超安康王志忠
Owner SANECHIPS TECH CO LTD
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