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A device and method for supporting multi-channel variable-length cell time slot multiplexing

A time slot multiplexing and cell technology, which is applied in the field of communication, can solve the problems of not being able to handle variable-length cell input, etc., and achieve the effect of improving processing flexibility, improving flexibility, and ensuring bandwidth utilization

Active Publication Date: 2017-02-08
SANECHIPS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] In order to overcome the problem that the prior art cannot handle the input of variable-length cells, the present invention provides a device and method for multiplexing multi-channel variable-length cell time slots

Method used

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  • A device and method for supporting multi-channel variable-length cell time slot multiplexing
  • A device and method for supporting multi-channel variable-length cell time slot multiplexing
  • A device and method for supporting multi-channel variable-length cell time slot multiplexing

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Embodiment approach

[0051] In a preferred embodiment, the multiplexer in the gate network module 102 gates and outputs the received variable-length cell data and sends it to the output storage module 103 under the control of the tempo control signal sent by the control logic module 104 .

[0052] The output storage module 103 is used for buffering the variable-length cell data from the gating network module 102, and according to the third timing control command sent by the control logic module 104, the variable-length cell data that has been multiplexed by the time slot output.

[0053] During specific implementation, it includes several storage sub-modules, which may be constituted by RAM or registers. It is used to receive the data input by the corresponding multiplexer in the gating network module 102, and output the multiplexed data after a certain timing.

[0054] In a preferred embodiment, the output storage module 103 includes a plurality of parallel RAMs or registers for buffering the va...

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Abstract

Disclosed are a device and method for supporting time-slot multiplexing of multichannel variable-length cells. The method comprises: an input storage module respectively caching input multichannel variable-length cells, and according to a first time-sequence control command sent by a control logic module, outputting the data of the variable-length cells cached to a gating network module; according to a second time-sequence control command sent by the control logic module, the gating network module comprising a plurality of parallel multiplexers performing gating output on the data of the variable-length cells read out from the input storage module; and the output storage module caching the data of the variable-length cells from the gating network module, and according to a third time-sequence control command sent by the control logic module, outputting the data of the variable-length cells which have completed the time-slot multiplexing. The present invention can in real time process the time-slot multiplexing of multichannel variable-length cells under any relative relationship, thereby guaranteeing the utilization of the bandwidth of each input port and improving the processing flexibility.

Description

technical field [0001] The present invention relates to the technical field of communication, in particular, to a device and method for supporting multi-channel variable-length cell time slot multiplexing, in particular, it can be applied to the input interface part of a router or a switch. Background technique [0002] In modern communication networks, the exchange and processing methods based on cells (fixed-length packet data) are becoming more and more common. This is because the communication circuit using cells as the basic data unit has the characteristics of high transmission efficiency and simple processing. Among them, shared storage is a commonly used structure of switching chips, in which multiple input and output ports share a storage space, which has the advantage of high memory utilization. [0003] The Chinese patent application with the patent application number 200520078701.3 discloses a synchronous digital signal multiplexing and decomposing circuit. In th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04J3/16
CPCH04L12/417
Inventor 王馨廖智勇
Owner SANECHIPS TECH CO LTD
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