A power device and a preparation method thereof

Abstract

A power device and a method for manufacturing the same are provided, includes a substrate of a first conductivity type, a first epitaxial layer of a first conductivity type, filling the second trenchwith a second epitaxial layer of a first conductivity type, filling the first trench with a third epitaxial layer of a second conductivity type, etching portions of the first epitaxial layer and the third epitaxial layer to form a third trench, forming an injection region of a second conductivity type on a bottom surface of the fourth trench, filling an inverted T-shaped silicon oxide layer in thefourth trench, filling a fourth epitaxial layer of the first conductivity type in the third trench, and filling a fifth epitaxial layer of the first conductivity type, a source electrode, a gate electrode, and a drain electrode in a remaining portion of the fourth trench. This structure not only increases the breakdown voltage resistance, but also decreases the on-resistance and improves the performance of VDMOS devices.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a power device and a preparation method thereof. Background technique [0002] VDMOS (abbreviation of VDMOSFET, Vertical Double Diffused Metal Oxide Semiconductor Field Effect Transistor, Vertical Double Diffused Metal Oxide Semiconductor Field Effect Transistor) has drain and source poles on both sides of the device, allowing current to flow vertically inside the device, increasing the current density , the rated current is improved, and the on-resistance per unit area is also small. It is a very versatile power device. For power devices, there are two extremely important parameters, one is the on-resistance, and the other is the breakdown voltage. For the application, the on-resistance should be as small as possible, and the higher the breakdown voltage, the better. In order to withstand high voltages, power devices need to use very thick low-doped epitaxial layers. By...

AI Technical Summary

Problems solved by technology

By increasing the thickness of the epitaxial layer or reducing the doping concentration of the epitaxial layer, the breakdown voltage can be increased, but at the same time, the on-resistance is increased, which is not conducive to reducing the power loss when the device is turned on.

It can be seen that there is an unresolvable contradiction between increasing the VDMOS breakdown voltage and reducing the on-resistance in the existing technology, which affects the continuous improvement of the performance of VDMOS devices.

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