Lateral dmos device structure and manufacturing method thereof

Abstract

A lateral DMOS device having a structure that prevents breakdown of a semiconductor device while enhancing the breakdown voltage property. The lateral DMOS device can include a body diode region having a second conduction type well region formed in a first conduction type semiconductor substrate, the second conduction type well region including a first conduction type body region and a drain region each formed in the second conduction type well region, a first conduction type impurity region formed in the first conduction type body region, a source region formed in the first conduction type body region, and a gate insulating film and a gate electrode formed on the first conduction type semiconductor substrate, wherein the first conduction type body region and the second conduction type well region compose a body diode; and a protective diode region in which the first conduction type impurity region is formed at a prescribed interval, wherein the first conduction type body region and the second conduction type well region compose a protective diode.

Description

technical field [0001] This application claims priority from Korean Patent Application No. 10-2007-0048556 (filed May 18, 2007), the entire contents of which are hereby incorporated by reference. Background technique [0002] Power MOS field effect transistors (MOSFETs) can have higher input impedance than bipolar transistors. Therefore, the power MOSFET can have high power gain and simple gate drive circuit. In addition, since power MOSFETs are unipolar devices, there is no time delay due to minority carrier accumulation or recombination when the device is turned off. This power MOSFET can be used in switch-mode power supplies, lamp stabilization systems, and motor drive circuits. In general, semiconductor devices having a DMOS structure using planar diffusion technology are widely used. [0003] example figure 1 A lateral DMOS device is shown, which may include an N well 102 formed on and / or over a P-type semiconductor substrate 100 with a single concentration, and a d...

AI Technical Summary

Problems solved by technology

If a large current flows through the body diode, minority carrier accumulation, diode turn-off delay, and parasitic diode junction transistor operation may occur

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