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Efficient RDL design method for back-end semi-custom design of integrated circuits

A custom design and integrated circuit technology, applied in CAD circuit design, calculation, electrical digital data processing, etc., can solve problems such as increasing design difficulty and complexity, long iteration time, and inability to design advanced and efficient designs, and achieve shortened design cycle, avoid ineffective work, and reduce the effect of design iterations

Pending Publication Date: 2019-03-12
嘉兴倚韦电子科技有限公司
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AI Technical Summary

Problems solved by technology

Due to the introduction of RDL technology under advanced technology, conventional design methods cannot combine the characteristics of RDL to carry out more advanced and efficient designs. On the contrary, they encounter technical thresholds and increase design difficulty and complexity.
[0003] At present, there is no uniform and efficient RDL design method in the industry, and conventional design methods have the problems of poor RDL design quality and too long iteration time

Method used

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  • Efficient RDL design method for back-end semi-custom design of integrated circuits
  • Efficient RDL design method for back-end semi-custom design of integrated circuits
  • Efficient RDL design method for back-end semi-custom design of integrated circuits

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Embodiment Construction

[0026] The present invention discloses a high-efficiency RDL design method for integrated circuit back-end semi-custom design. The specific implementation of the present invention will be further described below in combination with preferred embodiments.

[0027] It is worth mentioning that those skilled in the art should note that the "RDL" (Redistribution Layer) involved in the patent application of the present invention is defined as "redistribution layer"; the "GDS" involved in the patent application of the present invention is defined as a A kind of "data format during chip production"; "LVS" involved in the patent application of the present invention is defined as "comparison between layout and schematic diagram"; "DRC" involved in the patent application of the present invention is defined as "design rule check"; The "IP" involved in the patent application of the present invention is defined as "intellectual property rights"; the "IO" involved in the patent application of...

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Abstract

The invention discloses an integrated circuit back-end semi-customized design high-efficient RDL design method, comprising the following steps: step S1: global chip planning is carried out based on RDL design requirements. Step S2: final RDL design data is generated based on the chip global planning result in step S1. The invention discloses an efficient RDL design method for back-end semi-customized design of integrated circuits, which has the beneficial effects that the RDL design step, the RDL data integration step and the RDL data inspection step are arranged to ensure the success of the final taping, avoid invalid work, reduce the design iteration times and shorten the whole chip design cycle.

Description

technical field [0001] The invention belongs to the technical field of integrated circuit design automation, and in particular relates to an efficient RDL design method for integrated circuit back-end semi-custom design. Background technique [0002] As the chip design process becomes more and more advanced, the corresponding chip packaging technology has been improved, so the packaging technology RDL (redistribution layer) is introduced. Due to the introduction of RDL technology under advanced technology, conventional design methods cannot combine the characteristics of RDL to carry out more advanced and efficient designs. On the contrary, they encounter technical thresholds and increase design difficulty and complexity. [0003] At present, there is no uniform and efficient RDL design method in the industry, and conventional design methods have the problems of poor RDL design quality and too long iteration time. Therefore, using an efficient RDL design method to improve t...

Claims

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Application Information

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IPC IPC(8): G06F17/50
CPCG06F30/39Y02D10/00
Inventor 徐靖
Owner 嘉兴倚韦电子科技有限公司
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