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A data prefetching method and apparatus for a data structure oriented graphics processor

A graphics processor and data prefetching technology, which is applied in the direction of electrical digital data processing, processor architecture/configuration, details related to image processing hardware, etc., can solve the problem of low prefetching efficiency and achieve simple and simple calculation logic The effect of hardware structure implementation

Active Publication Date: 2019-03-12
NAT UNIV OF DEFENSE TECH
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  • Application Information

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Problems solved by technology

But for the irregular storage access pattern of breadth-first search, the prefetching efficiency of these three data prefetchers is very inefficient or even invalid

Method used

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  • A data prefetching method and apparatus for a data structure oriented graphics processor
  • A data prefetching method and apparatus for a data structure oriented graphics processor
  • A data prefetching method and apparatus for a data structure oriented graphics processor

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Embodiment Construction

[0040] Such as Figure 4 As shown, the implementation steps of the data structure-oriented graphics processor data prefetching method in this embodiment include:

[0041] 1) Obtain the information of the storage access read request and the read data of the monitoring processor checklist data structure;

[0042] 2) Select the corresponding data prefetch request generation method according to the type of the storage access request: if the storage access request is an ordinary read access to the work list vector, then generate a prefetch request for the next item of the work list vector; if the If the storage access request is a prefetch access to the work list vector, a prefetch request to the vertex list vector is generated; if the storage access request is a prefetch access to the vertex list vector, a prefetch request to the edge list vector is generated; If the storage access request is a prefetch request to the edge list vector, then generate a prefetch request to the visi...

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Abstract

The invention discloses a data pre-fetching method and a data pre-fetching device of a graphics processor oriented to a data structure, The method comprises the following steps: obtaining the information of the storage access request and the read data of the monitoring processor check map data structure; utilizing the width-first search defined data structure access mode and the graph data structure information to generate corresponding four vector prefetch requests and store them in the prefetch request queue. The device comprises a data prefetching unit distributed in each processing unit, wherein the data prefetching unit is respectively connected with a memory access monitor, a memory access result buffer and a primary buffer of the memory access instruction unit; and the data prefetching unit comprises an address space classifier, a runtime information table, a prefetch request generation unit and a prefetch request queue. The invention more accurately and efficiently prefetches the data needed for carrying out graph traversal by using width-first search, thereby improving the performance of GPU in handling graph calculation problems.

Description

technical field [0001] The invention relates to the field of data prefetching of graphics processors, in particular to a data structure-oriented graphics processor data prefetching method and device. Background technique [0002] As the problem scale of graph computing applications continues to grow, the use of graphics processing units (GPUs) to accelerate graph computing applications in parallel has become the key for computers to deal with large-scale graph computing problems. However, since most graph computing applications are memory-intensive applications, the largest time overhead for these applications comes from the storage access generated by traversing the graph. Breadth-first search is the basic algorithm for graph traversal in many graph computing applications. However, due to the irregular memory access of the breadth-first search, the GPU generates more than one memory access request for each irregular memory access. This greatly affects the memory access ef...

Claims

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Application Information

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IPC IPC(8): G06T1/20
CPCG06T1/20G06T2200/28G06F9/383G06F9/345G06F2212/6024G06F2212/1016G06F12/0895G06F12/0862G06F2212/6022G06F2212/455G06F12/0811G06T1/60G06F9/3802G06F9/5016G06F11/3037
Inventor 黄立波郭辉郑重王志英郭维雷国庆王俊辉隋兵才孙彩霞王永文
Owner NAT UNIV OF DEFENSE TECH
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