An in-memory computing bit unit and an in-memory computing device

Abstract

The invention relates to an in-memory calculation bit unit and an in-memory calculation device, comprising: a four-tube storage unit and a four-tube calculation unit, the four-tube calculation unit includes a transistor T5, a transistor T6, a transistor T7 and a transistor T8; the drain of the transistor T7 It is connected with the pre-stored line A, the gate of the transistor T7 is connected with the calculation word line, the source of the transistor T7 is connected with the drain of the transistor T5, the gate of the transistor T5 is connected with the four-transistor storage unit, and the source of the transistor T5 is connected with the drain of the transistor T5. The source of the transistor T6 is connected, the gate of the transistor T6 is connected with the four-transistor storage unit, the drain of the transistor T6 is connected with the drain of the transistor T8, the gate of the transistor T8 is connected with the reverse computing word line, and the source of the transistor T8 The pole is connected to the pre-stored line B; the source of the transistor T5 and the source of the transistor T6 are both connected to the read bit line RBL. The present invention directly adopts the hold state when the design weight value is 0, which accelerates the calculation process.

Description

technical field [0001] The invention relates to the technical field of in-memory computing, in particular to an in-memory computing bit unit and an in-memory computing device. Background technique [0002] Deep neural networks (DNNs) and convolutional neural networks (CNNs) have achieved unprecedented improvements in the accuracy of large-scale recognition tasks. To address the problem of algorithmic complexity and memory access limitations, in recent algorithms, weights and neuron activations are binarized to +1 or −1, making the multiplication between weights and input activations a simple binary multiplication . [0003] The calculation method of traditional single-bit input multiplied by single-bit weight is inefficient, and there is no relative advantage in calculation throughput; the use of 6T structure for weight storage will increase the process cost; and in the calculation process, the traditional calculation method will exist whether the input and weight are 1 or ...

AI Technical Summary

Problems solved by technology

[0003] The calculation method of traditional single-bit input multiplied by single-bit weight is inefficient, and there is no relative advantage in calculation throughput; the use of 6T structure for weight storage will increase the process cost; and in the calculation process, the traditional calculation method will exist whether the input and weight are 1 or 0 is all calculated. For the redundancy of multiplying the calculation number and 0, the calculation time and power consumption are greatly wasted, and the leakage of the output bit line during the calculation process will also cause leakage power consumption. The problem needs to be solved urgently

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