In-memory computing bit unit and in-memory computing device

A bit unit and storage unit technology, applied in the field of memory computing, can solve the problems of leakage power consumption, waste of computing time and power consumption, low efficiency, etc., and achieve the effect of simple calculation logic, reduction of on-off process, and acceleration of calculation process
CN112558919AActive Publication Date: 2021-03-26中科南京智能技术研究院

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
中科南京智能技术研究院
Publication Date
2021-03-26

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Abstract

The invention relates to an in-memory calculation bit unit and an in-memory calculation device, the in-memory calculation bit unit comprises a four-tube storage unit and a four-tube calculation unit,the four-tube calculation unit comprises a transistor T5, a transistor T6, a transistor T7 and a transistor T8; the drain electrode of the transistor T7 is connected with a pre-storage line A, the grid electrode of the transistor T7 is connected with a calculation word line, the source electrode of the transistor T7 is connected with the drain electrode of the transistor T5, the grid electrode ofthe transistor T5 is connected with the four-tube storage unit, the source electrode of the transistor T5 is connected with the source electrode of the transistor T6, and the grid electrode of the transistor T6 is connected with the four-tube storage unit; the drain electrode of the transistor T6 is connected with the drain electrode of the transistor T8, the grid electrode of the transistor T8 isconnected with the inverse calculation word line, and the source electrode of the transistor T8 is connected with the pre-storage line B; and the source electrode of the transistor T5 and the sourceelectrode of the transistor T6 are connected with a read bit line RBL. When the weight value is designed to be 0, the retention state is directly adopted, and the calculation process is accelerated.
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Description

technical field

[0001] The invention relates to the technical field of in-memory computing, in particular to an in-memory computing bit unit and an in-memory computing device. Background technique

[0002] Deep neural networks (DNNs) and convolutional neural networks (CNNs) have achieved unprecedented improvements in the accuracy of large-scale recognition tasks. To address the problem of algorithmic complexity and memory access limitations, in recent algorithms, weights and neuron activations are binarized to +1 or −1, making the multiplication between weights and input activations a simple binary multiplication .

[0003] The calculation method of traditional single-bit input multiplied by single-bit weight is inefficient, and there is no relative advantage in calculation throughput; the use of 6T structure for weight storage will increase the process cost; and in the calculation process, the traditional calculation method will exist whether the input and weight are 1 or ...

Claims

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