The application patent relates to the technical field of
integrated circuit technology, and particularly relates to a manufacturing method of a full-gate device with four ports. The manufacturing method comprises the following steps: S1, epitaxial growth: firstly, N-epitaxial layer and P+ epitaxial layer, intrinsic
silicon layer are grown on N+ substrate in sequence through epitaxial growth technology; S2,
etching: the N-epitaxial layer, P+ epitaxial layer and intrinsic
silicon layer are etched to remove the excess part; S3,
thermal oxidation: the etched part is grown with SiO2 layer through
thermal oxidation process; S4,
ion implantation: N- region is doped to form N-source region through
ion implantation process on the intrinsic
silicon layer, and N+ region is doped to form N+ source region on the N-source region; S5, re-
etching:
etching is performed on the region of SiO2 layer to obtain a ring-shaped groove, a rectangular groove and a cylindrical groove; S6,
metal deposition:
metal is deposited in the ring-shaped groove, the rectangular groove and the cylindrical groove. The method can enhance the anti-TID effect of the device, and different potentials can be applied to the source and the substrate according to the actual circuit condition.