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Semiconductor device

A semiconductor, conductive type technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of voltage resistance fluctuation, poor reliability, charge imbalance and so on

Active Publication Date: 2019-03-22
KK TOSHIBA +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this case, the charge imbalance will also occur and the withstand voltage will fluctuate, which may cause poor reliability.

Method used

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  • Semiconductor device
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Examples

Experimental program
Comparison scheme
Effect test

no. 1 approach

[0022] The semiconductor device according to the first embodiment includes: a semiconductor layer having a first surface and a second surface; a first electrode provided in contact with the first surface; a second electrode provided in contact with the second surface; a semiconductor region disposed in the semiconductor layer; a ring-shaped second semiconductor region of the second conductivity type disposed between the first semiconductor region and the first surface, connected to the first surface, and electrically connected to the first electrode; and The third semiconductor region of the second conductivity type is arranged around the second semiconductor region, is arranged between the first semiconductor region and the first surface, is in contact with the first surface, has the first region, and is farther away from the second semiconductor region than the first region. A second region of the semiconductor region, a third region further away from the second semiconductor...

no. 2 approach

[0081] The semiconductor device of the second embodiment differs from the first embodiment in that at least a part of the first region has a second conductivity type impurity concentration lower than that of at least a part of the second region. Hereinafter, descriptions will be omitted for parts that overlap with those of the first embodiment.

[0082] Figure 6A , Figure 6B , Figure 6C It is an enlarged schematic cross-sectional view of the terminal region of the semiconductor device according to the second embodiment. Figure 6A for the sectional view, Figure 6B is a graph showing the p-type impurity amount of each impurity region, Figure 6C is a graph showing the electric field intensity distribution.

[0083] In the SBD of the second embodiment, the depths of the first region 18a, the second region 18b, and the third region 18c are substantially constant.

[0084] The p-type impurity concentration at any position of the first region 18a is lower than the p-type ...

no. 3 approach

[0089] The semiconductor device according to the third embodiment differs from the first embodiment in that a fourth semiconductor region of the first conductivity type having a higher impurity concentration of the first conductivity type than the first semiconductor region is provided between the first region and the first semiconductor region. different ways. Hereinafter, descriptions will be omitted for parts that overlap with those of the first embodiment.

[0090] Figure 7A , Figure 7B , Figure 7C It is an enlarged schematic cross-sectional view of the terminal region of the semiconductor device of the third embodiment. Figure 7A for the sectional view, Figure 7B is a graph showing the p-type impurity amount of each impurity region, Figure 7C is a graph showing the electric field intensity distribution.

[0091] The SBD of the third embodiment includes an n-type region 40 (fourth semiconductor region).

[0092] In the SBD of the third embodiment, the p-type i...

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Abstract

A semiconductor device according to an embodiment includes a semiconductor layer a semiconductor layer having a first plane and a second plane; a first electrode; a second electrode; a first semiconductor region of a first conductivity type provided in the semiconductor layer; a second semiconductor region of a second conductivity type provided between the first semiconductor region and the firstplane, the second semiconductor region being electrically connected to the first electrode; and a third semiconductor region of the second conductivity type surrounding the second semiconductor region, the third semiconductor region provided between the first semiconductor region and the first plane, the third semiconductor region including a first region, a second region, and a third region, thesecond region being further away from the second semiconductor region than the first region, the third region being further away from the second semiconductor region than the second region, wherein anamount of second-conductivity-type impurities in the first region, the second region, and the third region is less than an amount of second-conductivity-type impurities in the second semiconductor region, an amount of second-conductivity-type impurities in the first region is less than an amount of second-conductivity-type impurities in the second region, and an amount of second-conductivity-typeimpurities in the third region is less than an amount of second-conductivity-type impurities in the second region.

Description

[0001] Associate application [0002] This application enjoys the priority of the basic application based on Japanese Patent Application No. 2017-178414 (filing date: September 15, 2017). This application incorporates the entire content of the basic application by referring to this basic application. technical field [0003] Embodiments relate to semiconductor devices. Background technique [0004] In order to maintain the withstand voltage of the semiconductor power device, a termination region (Termination Region) is provided around the active region (Active Region). By providing the termination region, the electric field strength at the end of the active region is relaxed, thereby maintaining the withstand voltage of the semiconductor power device. From the viewpoint of reducing the chip size, it is required to shorten the terminal length which is the length of the terminal region as much as possible. [0005] A reduced surface field (RESURF: Reduced Surface Field) str...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06
CPCH01L29/0603H01L29/0611H01L29/0684H01L29/78H01L29/36H01L29/7395H01L29/7811H01L29/0615H01L29/0638H01L29/1608H01L29/2003H01L29/404H01L29/872H01L29/0619H01L29/0634H01L29/1095H01L29/0692H01L29/66143
Inventor 玉城朋宏
Owner KK TOSHIBA
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