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Dual-track pre-charging logic device

A logic device and pre-charging technology, applied in the field of anti-power attack and information security, can solve the problem of increasing the transient power consumption of the clock edge, etc., to reduce complexity, eliminate power consumption differences, and ensure the ability to resist DPA attacks Effect

Active Publication Date: 2019-03-29
TIANJIN UNIV
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  • Abstract
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  • Claims
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Problems solved by technology

Conventional side-channel protection methods include blinding leakage protection, eliminating leakage protection, weakening leakage protection, etc.; protection at the circuit level is usually achieved by designing a new type of logic unit, and its main design idea is dual-rail pre-charging logic. The unit mainly includes Sensitive Amplifier Logic (Sense Amplifier Based Logic, SABL) [1] , Wave Dynamic Differential Logic (WDDL) [2] And look-up table-based differential logic LBDL (LUT Based Differential Logic) [3] etc. Among them, SABL is the earliest protection unit proposed, but due to the design method of dynamic logic unit, the complexity of the design is increased
At this stage, more and more design automation tools are used for the design of large circuits, and the use of logic units with clock signals relies on more advanced automation tools. In addition, the use of large-scale dynamic units improves the instantaneous state power consumption, which has higher requirements on the power supply

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  • Dual-track pre-charging logic device

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Embodiment Construction

[0017] In order to solve the above problems, the present invention proposes a new dual-rail precharge logic unit, which inherits the advantages of the SABL unit, that is, it has a complementary topology structure, which ensures that the discharge conditions of the internal nodes are the same under different inputs, and at the same time A new pre-charge structure is adopted to replace the original clock signal, making the new dual-rail pre-charge logic unit compatible with the existing design process.

[0018] In order to improve the anti-DPA attack capability of the unit, a dual-rail pre-charged logic unit is proposed. Combine below figure 1 The unit structure and working principle of the standard unit are introduced. The basic structure of the logic unit is SABL logic, figure 1 It is a circuit diagram of the XOR / XNOR unit of an improved SABL structure, where A, B, It is the input signal of the unit, and XOR and XNOR are the output signals of the unit. Compared with the ...

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Abstract

The invention relates to the field of information security, and provides a dual-track pre-charging logic unit suitable for use in a security chip. The logic unit can reduce complexity of applying a dynamic logic circuit to a semi-custom design process, and ensure balance of power consumption of the logic unit under different input signals to cause attackers to be unable to use power consumption information to obtain internal data of the chip. Therefor, the adopted technical solution of the invention is a dual-track pre-charging logic device. The device includes PMOS transistors P1, P2, P3, P4,P5 and P6, NMOS transistors N1, N2, N3, N4, N5, N6, N7, N8, N9, N10 and N11 and two inverters I1 and I2. The device is mainly used in information security occasions.

Description

technical field [0001] The invention relates to the field of information security and the field of anti-power attack. In particular, it relates to dual-rail precharge logic devices. Background technique [0002] In today's society, information exchange has become an indispensable part of daily life. While people are enjoying various conveniences brought by the development of IT technology, information security has also received more and more attention. The use of cryptographic chips represented by application-specific integrated circuits (ASICs) to implement cryptographic algorithms has advantages incomparable to software implementations such as low cost, good sealing, high difficulty in cracking, and fast encryption speed, and has become an important carrier of cryptographic algorithms. . Although the embeddedness of cryptographic devices makes it impossible for attackers to directly obtain the key information in cryptographic chips, since most cryptographic chips are com...

Claims

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Application Information

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IPC IPC(8): H04L9/00
CPCH04L9/003H04L2209/12
Inventor 赵毅强蔡里昂辛睿山叶茂甄帅
Owner TIANJIN UNIV
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