Wafer bonding device and wafer bonding method

A wafer bonding and wafer technology, applied in electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve problems such as poor wafer bonding quality, improve performance, improve bonding effect, and increase alignment The effect of precision

Active Publication Date: 2019-04-05
YANGTZE MEMORY TECH CO LTD
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Problems solved by technology

[0007] The invention provides a wafer bonding device and a wafer bonding method, which are used to solve

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  • Wafer bonding device and wafer bonding method
  • Wafer bonding device and wafer bonding method
  • Wafer bonding device and wafer bonding method

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[0044] The specific embodiments of the wafer bonding apparatus and wafer bonding method provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0045] During the wafer bonding process, the alignment accuracy between the two wafers to be bonded has a crucial impact on the final bonding quality. Because the two wafers undergo different processes before bonding, the two wafers will experience different degrees of three-dimensional expansion (Expansion). Therefore, in the actual bonding process, the dimensions of the two wafers are different. In general, the greater the lateral dimension difference between the two wafers, the lower the alignment accuracy between the two wafers. However, in the current wafer bonding process, the influence of the three-dimensional expansion of the two wafers to be bonded in the previous process on the wafer size is not considered during the bonding process, so that the two wafers are bonded ...

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Abstract

The invention relates to the technical field of semiconductor manufacturing, and in particular to a wafer bonding device and a wafer bonding method. The wafer bonding device comprises: a measuring module, used for respectively acquiring sizes of two wafers to be bonded; and a bonding module, connected to the measuring module, and used for bonding the two wafers and adjusting the bonding pressure applied to the two wafers according to the relative sizes of the two wafers, so that the bonding pressure applied to the smaller wafer is greater than that applied to the larger wafer. The invention, by increasing the alignment precision between two wafers to be bonded, improves the bonding effect, and improves the performance of the semiconductor product.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer bonding device and a wafer bonding method. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and pursue lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NOR (3D or not) flash memory and 3D NAND (3D NAND) flash memory. [0003] Among them, 3D NAND memory takes its small size and large capacity as the starting point, and the design concept of highly integrated storage units stacked in three-dimensional mode is ...

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Application Information

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IPC IPC(8): H01L21/67H01L21/66
CPCH01L21/67092H01L21/67253H01L22/12H01L22/20
Inventor 邢瑞远丁滔滔王家文刘武刘孟勇陈国良
Owner YANGTZE MEMORY TECH CO LTD
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