Method and device for performing convolution operation, method and device for generating instructions
A technology of convolution operation and instruction, applied in the field of neural network, to achieve the effect of reducing hardware cost, design complexity, power consumption and area
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[0032] Hereinafter, exemplary embodiments according to the present application will be described in detail with reference to the accompanying drawings. Apparently, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments of the present application. It should be understood that the present application is not limited by the exemplary embodiments described here.
[0033] Application overview
[0034] As mentioned above, each convolution layer in a convolutional neural network usually needs to correspond to multiple convolution kernels of different sizes (for example, large-sized convolution kernels), and the hardware dedicated to performing neural network calculations ( For example, neural network accelerators) can only perform convolution operations for convolution kernels of a certain size due to hardware limitations.
[0035] In related technologies, in order to solve the problem that the above-mentioned hardware...
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