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Fabrication method of gate of thin film transistor

A technology of a thin film transistor and a manufacturing method, which is applied in the field of gate manufacturing of thin film transistors, and can solve the problems of yield loss, over-cutting, small operation window, etc.

Active Publication Date: 2020-11-06
SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, it is difficult to control the taper angle of metal traces after etching, generally greater than 80°, and even undercut. In the prior art, only the etching parameters and the concentration of metal ions in the solution To control, but the operating window of the process is small, so it is easy to cause disconnection and electrostatic discharge (electro static discharge; ESD) yield loss

Method used

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  • Fabrication method of gate of thin film transistor
  • Fabrication method of gate of thin film transistor
  • Fabrication method of gate of thin film transistor

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Embodiment Construction

[0036] In order to make the above objects, features and advantages of the present invention more comprehensible, preferred embodiments of the present invention will be described in detail below together with the accompanying drawings. Furthermore, the directional terms mentioned in the present invention, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side", etc., It is only with reference to the direction of the attached drawings. Therefore, the directional terms used are used to illustrate and understand the present invention, but not to limit the present invention.

[0037] refer to Figure 1 to Figure 7 as shown, Figure 1 to Figure 2 It is a schematic diagram of the first step to the sixth step of a gate fabrication method of a thin film transistor according to the present invention, Figure 7 It is a flow chart of a gate manufacturing method of a thin film transistor of the present invention.

[0038] The invention provides a gate manufa...

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Abstract

Disclosed is a gate manufacturing method for a thin-film transistor. The method includes the steps of: exposure and developing, first wet etching, photoresist burning, second wet etching, and photoresist layer (30) removal, such that a trapezoidal gate metal layer (20) is manufactured on a substrate (10). The taper angle of the gate metal layer (20) is relatively small, such that the occurrence rate of undercut and electrostatic discharge can be reduced, thereby achieving the aim of improving an operating window during a manufacturing procedure.

Description

technical field [0001] The invention relates to a gate fabrication method of a thin film transistor, in particular to a gate fabrication method for controlling the slope angle of the gate. Background technique [0002] With the development of flat panel display technology, large size, high resolution, high contrast, high refresh rate, narrow frame, and thinning have become the development trend of flat panel display, but large size, high resolution display panel, such as a 75-inch ( inch) 8K120Hz display panel, its line scanning time is only less than 2 microseconds (μs: 10 -6 seconds), and since the charging time is less than the scan time minus the line delay of the signal, the line delay can only be reduced by increasing the film thickness of the metal wiring. [0003] However, it is difficult to control the taper angle of metal traces after etching, generally greater than 80°, and even undercut. In the prior art, only the etching parameters and the concentration of meta...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28G03F1/32
CPCG03F1/32H01L21/28079H01L21/28123
Inventor 王文龙徐向阳
Owner SHENZHEN CHINA STAR OPTOELECTRONICS SEMICON DISPLAY TECH CO LTD