Method for forming three-dimensional memory and three-dimensional memory

A memory, three-dimensional technology, applied in the direction of electric solid-state devices, semiconductor devices, electrical components, etc., can solve problems such as slow speed, and achieve the effect of maintaining the speed of erasing operations

Inactive Publication Date: 2019-05-07
YANGTZE MEMORY TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This approach is slower, especially in the higher layers of 3D memory devices

Method used

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  • Method for forming three-dimensional memory and three-dimensional memory
  • Method for forming three-dimensional memory and three-dimensional memory
  • Method for forming three-dimensional memory and three-dimensional memory

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Embodiment Construction

[0030] In order to make the above objects, features and advantages of the present invention more comprehensible, specific implementations of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0031] In the following description, many specific details are set forth in order to fully understand the present invention, but the present invention can also be implemented in other ways than those described here, so the present invention is not limited by the specific embodiments disclosed below.

[0032] As indicated in this application and claims, the terms "a", "an", "an" and / or "the" do not refer to the singular and may include the plural unless the context clearly indicates an exception. Generally speaking, the terms "comprising" and "comprising" only suggest the inclusion of clearly identified steps and elements, and these steps and elements do not constitute an exclusive list, and the method or device may also contain other st...

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Abstract

The invention relates to a method for forming a three-dimensional memory and a three-dimensional memory. The three-dimensional memory comprises a substrate, a doped well region, a stack layer on the substrate and a channel structure which vertically passes through the stack layer and reaches the well region, wherein the doped well region is located in the substrate, and the well region is contacted with the substrate; the stack layer includes spaced grid layers; the channel structure includes a channel layer, and the part, which is located in the well region, of the channel layer is exposed from the side surface of the channel structure so as to be contacted with the well region. It is unnecessary to form a silicon epitaxial layer at the bottom of the channel holes, so that the negative effect of the technology can be avoided.

Description

technical field [0001] The present invention mainly relates to a semiconductor manufacturing method, and in particular to a method for forming a three-dimensional memory and a three-dimensional memory. Background technique [0002] In order to overcome the limitations of two-dimensional memory devices, memory devices with a three-dimensional (3D) structure have been developed and mass-produced in the industry, which improves integration density by three-dimensionally arranging memory cells on a substrate. [0003] In a three-dimensional memory device such as 3D NAND flash memory, a memory array may include a core region having a channel structure. The channel structure is formed in the channel hole vertically penetrating through the stack of the three-dimensional memory device. A silicon epitaxial layer is arranged at the bottom of the channel hole so as to connect the channel layer and the substrate. However, in the conventional process, the etching of the channel hole wi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11582H01L27/1157H01L27/11556H01L27/11524H01L27/115
Inventor 薛磊
Owner YANGTZE MEMORY TECH CO LTD
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