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Memory testing device and method compatible with an eMMC protocol and an SD protocol

A memory test and memory technology, which is applied in static memory, instruments, electrical digital data processing, etc., can solve the problem that the test hardware cannot be fully functionally compatible, and achieve the effect of reducing hardware overhead

Active Publication Date: 2019-05-24
珠海妙存科技有限公司
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Problems solved by technology

[0005] The present invention aims at the problem that the test hardware of eMMC 5.0 / 5.1 and mainstream SDC (SD 3.0) in the prior art cannot be fully functionally compatible, and proposes a memory test device and method compatible with eMMC protocol and SD protocol

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  • Memory testing device and method compatible with an eMMC protocol and an SD protocol
  • Memory testing device and method compatible with an eMMC protocol and an SD protocol
  • Memory testing device and method compatible with an eMMC protocol and an SD protocol

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Embodiment Construction

[0038] The idea, specific structure and technical effects of the present invention will be clearly and completely described below in conjunction with the embodiments and accompanying drawings, so as to fully understand the purpose, scheme and effect of the present invention. It should be noted that, in the case of no conflict, the embodiments in the present application and the features in the embodiments can be combined with each other. The same reference numbers are used throughout the drawings to indicate the same or similar parts.

[0039] It should be noted that, unless otherwise specified, when a feature is called "fixed" or "connected" to another feature, it can be directly fixed and connected to another feature, or indirectly fixed and connected to another feature. on a feature. In addition, descriptions such as up, down, left, and right used in the present application are only relative to the mutual positional relationship of the components of the present application ...

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Abstract

The invention provides a memory testing device compatible with an eMMC protocol and an SD protocol, and the device comprises a testing host and a testing slave, the testing host is connected with thetesting slave through a universal connector, and the testing host comprises a main controller, an eMMC and SD protocol universal connector, and a power supply circuit. The test slave comprises an eMMCtest daughter board and an SD test daughter board; wherein the eMMC and SD protocol universal connector can be compatible with an eMMC protocol and an SD protocol at the same time and provides a connection interface for connecting memories using the eMMC and SD protocols to the master controller and the test slave machine; The main controller is connected with the eMMC and SD protocol universal connector and the power supply circuit; and the eMMC test daughter board and the SD test daughter board are connected with the eMMC and SD protocol universal connector.

Description

technical field [0001] The invention relates to the field of memory testing, in particular to a memory testing device and method compatible with eMMC protocol and SD protocol. Background technique [0002] Both eMMC memory and SD memory (SDC) are common NAND Flash storage devices. The eMMC memory is usually in the form of BGA package. In embedded application scenarios, it is soldered on the PCB board and cannot be plugged and disassembled at will; SDC is usually in the form of a card. Mobile Storage, can be plugged in at will. [0003] The protocols of eMMC and SDC have many similarities, and the communication protocols of the physical layer are basically the same. Especially before eMMC5.0, the difference between eMMC and mainstream SDC (SD 3.0) is mainly reflected in the slightly different bus line width and power supply mode. Both accesses are based on a master-slave structure, and most hosts are compatible with accessing eMMC and SDC at the same time. Therefore, early...

Claims

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Application Information

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IPC IPC(8): G11C29/56G06F13/38
Inventor 温佳强
Owner 珠海妙存科技有限公司
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