Secondary power supply generation circuit capable of reducing interference

Abstract

The invention provides a secondary power supply generation circuit capable of reducing interference. An upper pole plate of a capacitor C0 is connected with an output node of VPOS power supply voltageand a source electrode of a fourth PMOS tube, and a lower pole plate of the capacitor C0 is connected with one end of a resistor R0 and a grid electrode of a fourth NMOS tube; the other end of the resistor R0 is connected with a drain electrode of the fourth NMOS tube, a drain electrode of the fourth PMOS tube and a grid electrode of the fourth PMOS tube; a source electrode of the fourth NMOS tube is grounded; and the output end of the secondary power supply VDDI generation circuit is connected with the upper pole plate of the capacitor C0 and the source electrode of the fourth PMOS tube. During second-stage discharging, the VDDI is raised, the voltage NG at the grid end of a N4 tube is coupled by the VDDI through C0, the N4 tube is better conducted, a channel is formed between the VDDI and the GND, the potential of the VDDI can be rapidly lowered, and the breakdown problem is weakened.

Description

technical field [0001] The invention relates to a power supply circuit, in particular to a secondary power generation circuit capable of reducing interference. Background technique [0002] Such as figure 1 As shown, the left half is the VPOS high-voltage discharge circuit, and the right half is the secondary power supply VDDI generating circuit. In the high-voltage stage, DISENPOS is set low, DISENPOSB is set high, and the voltage of DISENPOSB is VDDI. Since the gate voltage of P0 (PMOS transistor) is set low, the high voltage is turned on (the high voltage is turned on when the gate voltage is less than the voltage of any one of the source and drain plus the threshold voltage), so in the high-voltage stage, the P0 tube will turn on the VPOS power supply voltage The high voltage is turned on to the NN2 node, and the NN2 node transmits the high voltage of the VPOS supply voltage to the gate of the P1 transistor, and the P1 transistor is turned off. [0003] In the first s...

AI Technical Summary

Problems solved by technology

[0006] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a secondary power generation circuit capable of reducing interference, which is used to solve the problem that VPOS and VDDI are turned on during the second discharge stage of VPOS high voltage in the prior art. VPOS will pull up the VDDI potential, and there is a risk of exceeding the breakdown voltage with the negative high voltage VNEG in the circuit

Images