An anti-cracking circuit module and a design method of the anti-cracking circuit module
A technology of circuit modules and design methods, applied in the field of chip security design, can solve problems such as incorrect reverse analysis, hanging metal wires, and reducing the ability of chips to prevent cracking, and achieve the effect of simple design and easy implementation
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Embodiment 1
[0043] figure 1 is the circuit schematic diagram of the first embodiment, figure 2 for figure 1 The first layout form of the circuit diagram, image 3 for figure 1 The second layout form of the circuit diagram, Figure 4 for mixing figure 2 and image 3 The layout structure obtained by the different levels of the two layouts, Figure 5 By Figure 4 The circuit schematic diagram introduced by figure 1 and Figure 5 It can be seen that by mixing different layers of different layouts, the circuit schematic diagram will change, and the reverse analysis will fail. The unit in the following is just a generalization, not only referring to an inverter, but also referring to a transistor or a device. For the convenience of analysis, it can also refer to a circuit module, as long as it is within the scope of the present invention, it belongs to the protection to be protected Content.
[0044] Such as figure 1 As shown, the circuit Figure 10It includes 4 units, A, A'...
Embodiment 1
[0051] Another modified example of embodiment 1
[0052] Figure 6 yes figure 1 The third layout form of the circuit diagram, Figure 7 for mixing figure 2 Metal layer 1 and Figure 6 The layout structure obtained by the reverse analysis of the chip with different levels of the two layouts of the metal layer 2, Figure 8 yes Figure 7 The circuit schematic diagram derived from the layout structure, by figure 1 and Figure 8 It can be seen that by mixing different layers of different layouts, the circuit schematic diagram will change, and the reverse analysis will fail.
[0053] Figure 6 It is another design scheme of the layout structure of the circuit 1. The layout of cells A, A', B, B' is as follows Figure 6 As shown, the output terminal of unit A is connected to the metal line 611, the metal line 611 is formed in the metal layer 1, the metal line 611 is connected to the metal line 612 through the connection hole 631, the metal line 612 is formed in the metal ...
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