VDMOS device and fabricating method thereof

Abstract

The invention relates to a VDMOS device and a fabricating method thereof. The method comprises steps: a substrate of a first conductive type is provided, and a first epitaxial layer of a first conductive type grows on the surface of the substrate; a groove is formed on the surface of the first epitaxial layer; a first isolation layer is formed on the surface of the groove and the upper surface ofthe first epitaxial layer; a first polysilicon layer is formed on the surface of the first isolation layer on the surface of the groove; a second isolation layer is formed on the surface of the firstpolysilicon layer at the bottom of the groove; multiple second epitaxial layers of the first conductive type and third epitaxial layers of a second conductive type which are arranged at intervals areformed on the second isolation layer to fill the groove, wherein the bottom ends of the second epitaxial layers and the third epitaxial layers are connected with the second isolation layer, and the first polysilicon layer located on the side wall of the groove is connected with a second epitaxial layer.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a VDMOS device and a manufacturing method thereof. Background technique [0002] VDMOS (vertical double-diffused metal oxide semiconductor field effect transistor, vertical double-diffused field effect transistor) device's drain and source poles are on both sides of the device, so that the current flows vertically inside the device, increasing the current density and improving the rated current, the unit The on-resistance of the area is also small, and it is a power device with a very wide range of uses. The gate of the VDMOS device controls the channel of the device to open, and the oxide layer at the gate position has poor high voltage resistance (usually <100V), and is extremely vulnerable to transient voltage surge damage, resulting in device failure. Therefore, the gate of the VDMOS device usually requires An electrostatic protection structure is added to avoid da...

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Problems solved by technology

The gate of the VDMOS device controls the channel of the device to open, and the oxide layer at the gate position has poor high voltage resistance (usually <100V), and is extremely vulnerable to transient voltage surge damage, resulting in device failure. Therefore, the gate of the VDMOS device usually requires Increase the electrostatic protection structure to avoid damage to the device caused by transient voltage surges. However, the existing electrostatic protection structure increases the device area, which in turn increases the packaging cost, which is not conducive to product reliability.

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