A backbone network of chip multi-source clock tree

Abstract

The invention relates to the technical field of integrated circuits, in particular to a backbone network of a chip multi-source clock tree. The embodiment of the invention provides a backbone networkof a chip multi-source clock tree. the clock trunk line in the trunk network in the clock line area is a clock trunk line distributed in an H shape; due to the fact that the capacitance of the H-shaped trunk line network is far smaller than that of the grid-shaped trunk line network, the power consumption of the H-shaped clock trunk line is small in the using process, and if the trunk line networkis adopted in the multi-source clock tree structure, the clock power consumption can be reduced, and the overall power consumption of a chip can be reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a backbone network of a chip multi-source clock tree. Background technique [0002] Most of the current integrated circuits are synchronous sequential digital circuit chips of CMOS (Complementary Metal Oxide Semiconductor) technology. This chip must contain a clock signal, and the clock signal is transmitted to the chip through a multi-source clock tree structure. on the electronics. [0003] Such as figure 1 As shown, the current multi-source clock tree structure adopts a Mesh (mesh) structure as the main line 101, transmits the clock signal output by the Mesh driver 102, and outputs the clock signal to the next-level clock driver 103 and the lower-level clock tree, wherein the Mesh structure With a regularly arranged grid, it is easy to expand the backbone network. However, the grid-like Mesh structure has high capacitance, which leads to high power consumption o...

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Problems solved by technology

[0005] The present invention provides a backbone network of a chip multi-source clock tree, which is used to solve the problem that the Mesh structure power con

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