Array substrate, manufacturing method thereof, display panel and display device
A technology of an array substrate and a manufacturing method, applied in the display field, can solve problems such as affecting the characteristics of thin film transistors, and achieve the effects of reducing parasitic capacitance, improving performance, and improving characteristics
Active Publication Date: 2019-07-19
BOE TECH GRP CO LTD +1
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Problems solved by technology
[0004] In view of this, the present invention provides an array substrate and its manufacturing method, a display panel and a display device, which solve the technical problem in the prior art that the active layer is easily irradiated by ambient light, thus affecting the characteristics of the thin film transistor
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[0051] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.
[0052] Those skilled in the art will understand that unless otherwise stated, the singular forms "a", "an", "said" and "the" used herein may also include plural forms. It should be further understood that the word "comprising" used in the specification of the present application refers to the presence of the features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or mor...
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The embodiment of the invention provides an array substrate. The array substrate comprises a substrate, an active layer, a gate, a source and a drain and also comprises a shielding layer, wherein theactive layer, the gate, the source and the drain are sequentially arranged on the substrate, the shielding layer is arranged between the substrate and the active layer, the outer profile of a positiveprojection region of the shielding layer on the substrate is larger than the outer profile of a positive projection region of the active layer on the substrate, a first via hole is formed in the shielding layer, the position of the first via hole is corresponding to a position where the source and the active layer are contacted, and / or a second via hole is formed in the shielding layer, and the position of the second via hole is corresponding to a position where the drain and the active layer are contacted. The embodiment of the invention also discloses a display panel, a display device and amanufacturing method of the array substrate. Since the outer profile of the shielding layer provided by the embodiment of the invention is larger than the outer profile of the active layer, the shielding effect of the shielding layer is improved; and meanwhile, the first via hole and / or the second via hole are formed in the shielding layer, so that parasitic capacitance among the source, the drain and the shielding layer is prevented.
Description
technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate and a manufacturing method thereof, a display panel and a display device. Background technique [0002] A traditional display panel includes an array substrate and a color filter substrate opposite to each other. The array substrate includes a plurality of thin film transistors. When the active layer included in the thin film transistor is illuminated, its characteristics are prone to drift, which affects the normal use of the thin film transistor. In order to prevent ambient light from directly or indirectly irradiating the active layer, a shielding layer is usually disposed under the active layer to block the ambient light from being irradiated. [0003] The inventors found that currently the position blocked by the shielding layer only corresponds to the position of the channel region of the active layer, but does not block the entire active layer a...
Claims
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IPC IPC(8): H01L27/12
CPCH01L27/1214H01L27/124H01L27/1259H01L27/1296
Inventor 程鸿飞马永达
Owner BOE TECH GRP CO LTD