High-reliability aerospace data and protection method for intermediate variables

Abstract

The invention discloses a method for protecting highly reliable aerospace data and intermediate variables, which mainly solves the problem of incomplete protection of aerospace data and intermediate variables in the prior art. The implementation steps are: 1) constructing a generation matrix and a check matrix; 2) ) Obtain aerospace data or intermediate variables as original data and calculate the original verification data according to the generation matrix; 3) store the original verification data in registers or memory; 4) read the final verification data from registers or memory and calculate the syndrome; 5) Judging whether the final verification data is wrong; 6) Correcting the wrong bits of the final verification data to obtain restored data equal to the original data or to give an error detection flag. The present invention uses 40-bit verification data to perform error correction and detection operations on 32-bit intermediate variables and aerospace data, which ensures the correctness of these data, and can obtain a higher code rate, improve the utilization rate of storage space, and can be used in aerospace environments In the FPGA on-chip registers, on-chip memory and external memory.

Description

technical field [0001] The invention belongs to the technical field of space electronics, and further relates to a method for protecting spaceflight data and intermediate variables, which can be used for FPGA on-chip registers, on-chip memory and external memory in the spaceflight environment. Background technique [0002] Since the communication system in the aerospace environment mostly uses a custom data frame format for data transmission, and the interface also uses a space-specific data interface, it is difficult to use standard ground network data processing equipment. FPGA is a programmable gate array, in which the deployed program can be repeatedly erased and programmed, which is very suitable for aerospace communication systems. However, the intensity of various types of radiation in the aerospace environment is greater than that in the ground environment, and the single event reversal SEU phenomenon is prone to occur in the storage unit of the FPGA, resulting in ab...

AI Technical Summary

Problems solved by technology

However, most of the data bit width in the internal data processing of switches and other equipment in the communication system is 32 bits or higher. Taking 32-bit data as an example, if (7,4) Hamming code is used for error correction, 24-bit supervision is required. bit, the code rate is too low, and there is a large waste of storage space and system processing power

Xue Ting and others from National University of Defense Technology proposed a 32-bit data error correction circuit design based on Hamming code in the journal Space Electronics Technology (2010, 07(2): 67-70), using (38, 32) to shorten the Hamming code The data in the 32-bit SRAM memory on the FPGA is corrected and detected, but the intermediate variables during the program running on the FPGA are not protected. Since the intermediate variables are stored in the registers, when the SEU phenomenon occurs in the registers, these The value of the intermediate variable will also produce unpredictable errors, and an error in the value of the intermediate variable can easily cause the program to freeze or even stop the operation of the device, and eventually paralyze the spacecraft communication system

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