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Asynchronous serial data exchange system and method based on FPGA

A data exchange and asynchronous serial technology, which is applied in the field of electrical signal transmission, can solve problems such as high bit error rate, unclear sending and receiving mechanism process, and imperfect handling of fault events, so as to reduce the high bit error rate of serial communication and simplify The effect of the sending and receiving process

Active Publication Date: 2019-10-25
716TH RES INST OF CHINA SHIPBUILDING INDAL CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, there are many solutions for asynchronous serial communication, but there are more or less problems such as unclear sending and receiving mechanism flow, high bit error rate, and imperfect handling of fault events.

Method used

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  • Asynchronous serial data exchange system and method based on FPGA
  • Asynchronous serial data exchange system and method based on FPGA
  • Asynchronous serial data exchange system and method based on FPGA

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Embodiment Construction

[0029] like figure 1 As shown, the circuit system involved in the present invention includes an FPGA (hereinafter referred to as the first unit U1), a Schmidt inverter 74HVC14 (hereinafter referred to as the second unit U2), a differential bus transceiver SN75176B (hereinafter referred to as the third unit U3), Serial peripherals (hereinafter referred to as the fourth unit U4 ), a first resistor R1 , a second resistor R2 , a third resistor R3 , a fourth resistor R4 , a fifth resistor R5 and a first fuse Fu1 . in,

[0030] The output terminal Y1 of the second unit U2 is connected to the input terminal Sin of the first unit U1, the output terminal Y0 of the second unit U2 is connected to the input terminal A1 of the second unit U2, and the output terminal En of the first unit U1 passes through the first resistor R1 is connected to GND, while the output terminal En is connected to the input terminal DE of the third unit U3, the input terminal RE_N of the third unit U3 is connect...

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Abstract

The invention provides an asynchronous serial data exchange system based on an FPGA. The asynchronous serial data exchange system comprises the FPGA, a Schmidt inverter, a differential bus transceiverand a serial peripheral interface, wherein the output end Y1 of the Schmidt inverter is connected with the input end Sin of the FPGA; the output end Y0 of the Schmidt inverter is connected with the input end A1; the output end En of the FPGA is respectively connected with the input end DE and the input end DE _ N of the differential bus transceiver; the output end Sout of the FPGA is connected with the input end D of the differential bus transceiver; the output end G of the differential bus transceiver is connected with the input end A0 of the Schmidt inverter; the VCC end of the differentialbus transceiver is connected with a first input pin of the serial peripheral interface through a first fuse; the output end A of the differential bus transceiver is connected with the second input pin of the serial peripheral interface, the input end B of the differential bus retractor is connected with the third output pin of the serial peripheral interface, and the GND end of the differential bus transceiver is connected with the fourth pin of the serial peripheral interface.

Description

technical field [0001] The invention relates to the technical field of electrical signal transmission, in particular to an FPGA-based asynchronous serial data exchange system and method. Background technique [0002] Asynchronous serial communication requires fewer transmission lines, high reliability, and long transmission distance, and is widely used in data exchange between micro-control systems and peripherals. With the rapid development of FPGA, FPGA plays an increasingly important role in asynchronous serial communication. The FPGA-based asynchronous serial communication system can effectively simplify circuit design, reduce the size of printed boards, improve reliability, and have greater flexibility in design. Asynchronous serial communication needs to handle the data sending and receiving mechanism, bus direction adjustment, data frame verification, etc., and has strict timing control requirements. Therefore, how to better handle the above timing mechanism is to im...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/40G06F13/42
CPCG06F13/4068G06F13/4282G06F2213/4004Y02D10/00
Inventor 刘超
Owner 716TH RES INST OF CHINA SHIPBUILDING INDAL CORP
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