An electrostatic protection circuit, semiconductor integrated circuit device and electronic equipment

Abstract

The invention discloses an electrostatic protection circuit and relates to the technical field of integrated circuit design. The electrostatic protection circuit is applied to an integrated circuit chip. An internal circuit in the integrated circuit chip is connected with a bonding pad end, an internal power supply end and a grounding end. The electrostatic protection circuit comprises: an electrostatic protection circuit; and the input end of the first protection circuit is connected between the internal circuit and the bonding pad end. The output end of a first protection circuit is connected with the internal power supply end. The first protection circuit is used for electrostatic protection between the integrated circuit chip and the internal power supply end. The electrostatic protection circuit has the beneficial effects that ESD current generated between the bonding pad end and the internal power supply end is prevented from damaging the internal circuit, so that electrostatic protection between the integrated circuit chip and the internal power supply end is realized. The invention further provides a semiconductor integrated circuit device and electronic equipment which have the effects.

Description

technical field [0001] The present invention relates to the technical field of integrated circuit design, in particular to an electrostatic protection circuit for protecting the internal circuit of an integrated circuit chip from ESD (Electro-Static Discharge), and to a semiconductor integrated circuit with the electrostatic protection circuit built in device and electronic equipment using the semiconductor integrated circuit device. Background technique [0002] Static electricity is everywhere. When the positive and negative charges are out of balance in a local area, static electricity will be generated. When two objects with different electrostatic potentials approach or touch each other, electrostatic discharge will occur. ESD risks exist in every link of semiconductor integrated circuit devices from production, packaging, testing, transportation to application, resulting in damage to semiconductor integrated circuit devices. [0003] However, with the continuous devel...

AI Technical Summary

Problems solved by technology

ESD risks exist in every link of semiconductor integrated circuit devices from production, packaging, testing, transportation to application, resulting in damage to semiconductor integrated circuit devices.

[0003] However, with the continuous development of integrated circuit technology, the feature size of semiconductor integrated circuits continues to shrink, the gate oxide thickness of transistors is getting thinner, and the area of ​​semiconductor integrated circuit devices is getting larger and larger. The current and voltage that MOS tubes can withstand It is also getting smaller and smaller, but the peripheral use environment is getting more and more complex

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