3results about How to "Realize electrostatic protection" patented technology

The embodiment of the present application discloses a method for inhibiting integrated circuit from static damage, comprising: providing a first chip, and arranging an integrated circuit on the first chip; providing a second chip, and arranging an electrostatic protection circuit on the second chip, the electrostatic protection circuit comprising: a first output port, a second output port and a first resistor; wherein, when an electrostatic pulse flows through the first resistor, the resistance of the first resistor increases; connecting the first output port with an output port of the integrated circuit, so that the electrostatic protection circuit can inhibit the integrated circuit from static damage. Moreover, the electrostatic protection circuit is arranged on the second chip, and the integrated circuit is arranged on the first chip, so that the integrated circuit and the electrostatic protection circuit are arranged on different chips, avoiding the problem that the integrated circuit cannot be designed for electrostatic protection due to the limitation of the base material of the chip on which the integrated circuit is arranged, and realizing the electrostatic protection of the integrated circuit of new material.

The embodiment of the application provides a high reverse maintaining DDSCR electrostatic protection device and a chip, the high reverse maintaining DDSCR electrostatic protection device comprises: a first conductive type substrate; a second conductive type buried layer; a well structure group located on the second conductive type buried layer, the well structure group comprises a plurality of first conductive type wells and second conductive type wells arranged alternately; an anode structure, the anode structure comprises a first anode heavily doped region and a second anode heavily doped region; a cathode structure, the cathode structure comprises a first cathode heavily doped region, a second cathode heavily doped region and a third cathode heavily doped region; a floating doping structure, the floating doping structure comprises at least one floating second conductive type heavily doped region. The scheme can realize bidirectional signal port electrostatic protection by increasing the floating doping structure, reducing the positive feedback of the parasitic SCR path, increasing the reverse maintaining voltage, keeping the reverse maintaining voltage consistent with the forward maintaining voltage.

This application provides a high reverse sustaining DDSCR electrostatic discharge (ESD) protection device and chip. The high reverse sustaining DDSCR ESD protection device includes: a first conductivity type substrate; a second conductivity type buried layer; a well structure group located on the second conductivity type buried layer, the well structure group including multiple alternately arranged first conductivity type wells and second conductivity type wells; an anode structure including a first heavily doped anode region and a second heavily doped anode region; a cathode structure including a first heavily doped cathode region, a second heavily doped cathode region, and a third heavily doped cathode region; and a floating doped structure including at least one floating second conductivity type heavily doped region. This solution, by adding a floating doped structure, reduces the positive feedback of the parasitic SCR path, increases the reverse sustaining voltage, and makes the reverse sustaining voltage consistent with the forward sustaining voltage, thus achieving bidirectional signal port ESD protection.