Sealing ring structure and preparation method thereof

A sealing ring and enhanced technology, which is applied in the field of sealing ring structure and its preparation, can solve the problems of increasing chip area, occupying the area of ​​integrated circuit chip, disadvantageous to miniaturization of devices, etc.
CN112701116AActive Publication Date: 2021-04-23湖南三安半导体有限责任公司
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
湖南三安半导体有限责任公司
Publication Date
2021-04-23

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Abstract

The invention discloses a sealing ring structure and a preparation method thereof and relates to the technical field of integrated circuits. The sealing ring structure comprises an enhanced high-electron-mobility transistor, a diode group and a resistor which are manufactured through a semiconductor epitaxial layer, the enhanced high-electron-mobility transistor is used for being annularly arranged on the periphery of a device region of a semiconductor device, and the diode group and the resistor are used for being arranged on the periphery of the device region; the anode of the diode group is in metal connection with the first electrode of the semiconductor device, the cathode is in metal connection with the first metal end of the resistor, and the second metal end of the resistor is in metal connection with the second electrode of the semiconductor device; and the grid electrode of the enhanced high-electron-mobility transistor is connected with the cathode metal of the diode group, the drain electrode is used for being connected with the first electrode metal, and the source electrode is used for being connected with the second electrode metal of the semiconductor device. The sealing ring structure can realize an electrostatic protection function by utilizing the sealing ring region, so that the area of the device is saved.
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Description

technical field

[0001] The invention relates to the technical field of integrated circuits, in particular, it is applied to semiconductor devices, and relates to a sealing ring structure and a preparation method thereof. Background technique

[0002] Electro-Static discharge (ESD) is the phenomenon of charge release and transfer between integrated circuit chips and external objects. Due to the release of a large amount of charge in a short period of time, the energy generated by ESD is much higher than the capacity of the chip, so it is likely to cause temporary failure or even permanent damage to the function of the chip. Therefore, in order to avoid damage to integrated circuits by static electricity as much as possible, electrostatic discharge protection design is very important in improving product reliability and yield.

[0003] Generally, an integrated circuit is separately provided with an electrostatic protection structure, so as to protect the integrated circuit wh...

Claims

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