Quick discharging circuit after shutdown for mainboard

Abstract

The invention discloses a quick discharging circuit after shutdown for a mainboard. The quick discharging circuit after shutdown for the mainboard comprises a first N-channel MOS transistor, a secondN-channel MOS transistor, a third N-channel MOS transistor, a fourth N-channel MOS transistor, a fifth N-channel MOS transistor and a six N-channel MOS transistor; the grid of the first N-channel MOStransistor is electrically connected to a SUS _S3# signal; the drain is respectively connected to a standby power supply, a second N-channel MOS transistor grid, a third N-channel MOS transistor grid,a fourth N-channel MOS transistor grid, a fifth N-channel MOS transistor grid and a sixth N-channel MOS transistor grid in parallel; drains of the second N-channel MOS transistor, the third N-channelMOS transistor, the fourth N-channel MOS transistor, the fifth N-channel MOS transistor and the six N-channel MOS transistor are respectively connected to a first power supply, a second power supply,a third power supply, a fourth power supply and a fifth power supply electrically; and the voltage from the first power supply to the fifth power supply is reduced in sequence. The quick dischargingcircuit after shutdown for the mainboard in the invention can quickly release charge; the interval time of starting for two times is effectively shortened; and the time sequence chaos problem while starting again can be avoided.

Description

technical field [0001] The invention relates to the field of circuits, in particular to a quick discharge circuit for a mainboard after shutdown. Background technique [0002] At present, the design of industrial equipment motherboards is extremely complicated, and the number of capacitors used is very large, resulting in slow and untimely discharge of capacitors after each shutdown. [0003] In the prior art, after shutdown, the capacitor discharges electricity very slowly, and the power supply design of the board has a power-on sequence requirement. If all the charges are not completely released after shutdown, the power-on operation will be performed again. At this time, the timing of power-on is disordered, which may cause the board to fail to power on or some chips that require power timing to fail to work normally. Contents of the invention [0004] The purpose of the present invention is to overcome the above problems in the prior art, and provide a fast discharge ...

AI Technical Summary

Problems solved by technology

If all the charges are not completely released after shutdown, the power-on operation will be performed again. At this time, the power-on sequence is chaotic, which may cause the board to fail to power on or some chips with power sequence requirements to fail to work normally.

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