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Three-dimensional resistive random access memory and reading circuit thereof

A technology of resistive variable memory and readout circuit, which is applied in the field of memory, can solve the problems that the readout circuit of the planar resistive variable memory cannot be applied, and the readout signal of the memory unit is weak, so as to improve accuracy and avoid excessive attenuation.

Active Publication Date: 2020-01-03
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

and figure 1 In the three-dimensional resistive memory array shown, since the memory unit has multiple layers, the readout signal of the memory unit is very weak, and the readout circuit of the planar resistive memory cannot be applied to figure 1 The three-dimensional resistive memory array shown

Method used

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  • Three-dimensional resistive random access memory and reading circuit thereof
  • Three-dimensional resistive random access memory and reading circuit thereof
  • Three-dimensional resistive random access memory and reading circuit thereof

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Embodiment

[0056] This embodiment provides a three-dimensional resistive memory and its readout circuit, figure 2 is a structural schematic diagram of the three-dimensional resistive memory. The three-dimensional resistive memory includes a storage array 20 , a row decoding module 21 , a column decoding module 22 , a layer decoding module 23 and a readout circuit 24 .

[0057] Specifically, the structure of the storage array 20 can refer to figure 1 , the storage array 20 includes:

[0058] The gate layer, the gate layer includes M word lines WL arranged in the row direction, N source lines SL arranged in the column direction, and M rows and N columns of field effect transistors ST arranged in an array, wherein the The gates of the field effect transistors ST in the same row are connected to the same word line WL, the sources of the field effect transistors ST in the same column are connected to the same source line SL, and M and N are positive integers;

[0059] L planar electrodes ...

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Abstract

The invention discloses a three-dimensional resistive random access memory and a read-out circuit thereof, the read-out circuit comprises L read-out modules, and each read-out module comprises a firstsensitive amplification unit, a second sensitive amplification unit and a comparison amplification unit; the first sensitive amplification unit is used for amplifying the read-out current of the corresponding planar electrode to obtain a first amplified current; the second sensitive amplification unit is used for amplifying the reference current to obtain a second amplified current; and the comparison amplification unit is used for amplifying and comparing the first amplification current and the second amplification current, and obtaining read-out data according to a comparison result. According to the three-dimensional resistive random access memory and the reading circuit thereof provided by the invention, excessive attenuation of reading current can be avoided, and the accuracy of reading data is ensured.

Description

technical field [0001] The invention relates to the technical field of memory, in particular to a three-dimensional resistive variable memory and a readout circuit thereof. Background technique [0002] With the advent of the big data era, ultra-high-density, ultra-large-capacity non-volatile storage technology has become the key to realizing massive information storage. The traditional two-dimensional architecture that uses planar scaling to increase storage density is far from meeting the demand for high-density memory from the explosive growth of data. Three-dimensional integration has become the main trend of future storage technology development. Among many new non-volatile memories, resistive random access memory (RRAM) is considered to be one of the most promising new storage technologies due to its simple structure and easy three-dimensional stacking. [0003] figure 1 It is a structural schematic diagram of a three-dimensional resistive memory array. The three-dim...

Claims

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Application Information

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IPC IPC(8): G11C13/00H01L27/24
CPCG11C13/004H10B63/845
Inventor 张锋
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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