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Semiconductor device and manufacturing method thereof

A manufacturing method and semiconductor technology, which is applied in the direction of semiconductor devices, semiconductor/solid-state device manufacturing, electric solid-state devices, etc., can solve the problems of inconsistent exposed heights of conductive columns, and achieve the effect of avoiding inconsistent exposed heights

Active Publication Date: 2022-04-19
SHANGHAI XIANFANG SEMICON CO LTD +1
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Problems solved by technology

[0004] In view of this, the present application provides a semiconductor device and its manufacturing method, which solves the problem of inconsistency in the exposed height of the conductive pillars in the TSV structure. The technical solution of the present invention is as follows:

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  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof
  • Semiconductor device and manufacturing method thereof

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Embodiment Construction

[0032] The following will clearly and completely describe the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0033] refer to Figure 1-Figure 5 , Figure 1-Figure 5 It is a process flow chart for exposing conductive pillars in TSV based on wet etching process, the process includes:

[0034] Step S11: if figure 1 As shown, a silicon substrate 11 having a TSV structure is provided. The silicon substrate 11 has opposite first and second surfaces. The TSV structure includes: a blind hole located on the first surface, the sidewall and bottom surface of the blind hole have a first in...

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Abstract

The invention discloses a semiconductor device and a manufacturing method thereof. In the technical proposal of the invention, after the second surface of the semiconductor substrate is thinned, the second surface is subjected to the first chemical mechanical grinding treatment. In this way, through mechanical The method of grinding combined with chemical grinding can remove the semiconductor substrate, the first insulating medium layer of the TSV structure, and the conductive pillars at the same time, so that the exposed conductive pillars are flush with the ground second surface, and the height of each conductive pillar is equal. Then, the ground second surface is etched, so that the height of the second surface is smaller than the height of the conductive pillars, and a second insulating dielectric layer is formed on the etched second surface, and the first The two insulating medium layers are flush with the conductive pillars. By applying the manufacturing method provided by the embodiment of the present invention, the problem of inconsistent exposed heights of the conductive pillars in the prior art is avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductor device manufacturing technology, and more specifically, relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] With the development of semiconductor technology, the feature size of integrated circuits continues to shrink, and the interconnection density of devices continues to increase. The traditional two-dimensional packaging can no longer meet the needs of the industry. With its key technical advantages of short-distance interconnection and high-density integration, the stacked packaging method has become the mainstream direction of packaging technology development. [0003] TSV technology is a technology that realizes electrical interconnection by making vertical through holes between different device structures by etching or laser drilling, and then depositing conductive substances in the vertical through holes by electroplating to form condu...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/683
CPCH01L21/76897H01L21/6835H01L2221/68359
Inventor 张春艳孙鹏李恒甫包焓曹立强
Owner SHANGHAI XIANFANG SEMICON CO LTD
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