Semiconductor test socket with hybrid coaxial structure and preparation method thereof

Abstract

The invention relates to a semiconductor test socket with a hybrid coaxial structure and a preparation method thereof. The test socket includes a test socket positioning plate, an insulating test socket body, an embedded conductive socket body, an embedded conductive socket cover plate, and an insulating test socket cover plate. The test socket positioning plate, the insulation test socket body and the insulation test socket cover are sequentially arranged from top to bottom, and the insulation test socket body is provided with a notch, and the embedded conductive socket body and the embedded conductive socket are arranged in the notch cover plate. The present invention uses the coaxial structure made of conductive metal to achieve better isolation between channels, which greatly reduces the production cost and production cycle of the test socket, and at the same time, the high-frequency signal part can reach the insertion loss of -1dB / 40GHz and -1dB / 40GHz. 10dB / 40GHz return loss, channel-to-channel isolation higher than ‑40dB / 20GHz.

Description

Technical field [0001] The present invention relates to the field of chip test sockets, and more particularly to a semiconductor test socket for mixing with an axis structure and a preparation method thereof. Background technique [0002] In the prior art, the semiconductor FPGA chip generally uses a coaxial structure test socket to test chip performance, with the individual of the semiconductor FPGA chip, and the high-frequency communication part is only very small, and the semiconductor FPGA chip does not High-frequency communications use coaxial structural test sockets will lead to increasing chip test costs. Inventive content [0003] It is an object of the present invention to provide a semiconductor test socket that mixes with an axis structure and a preparation method thereof to solve the problem of all of the prior art Semiconductor FPGA chips use coaxial structural test socket testing results in a problem of high chip test cost. [0004] One aspect of the present invent...

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Problems solved by technology

[0003] The purpose of the present invention is to provide a semiconductor test socket with a hybrid coaxial structure and a preparation method thereof, in order to solve the problem in the prior art that all semiconductor FPGA chips are tested with a coaxial structure test socket, resulting in high chip testing costs

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