A Configurable Approximate Multiplier for Quantized Convolutional Neural Networks and Its Implementation

A convolutional neural network and multiplier technology, applied in the field of configurable approximate multipliers, can solve problems such as poor efficiency, small bit width, resource waste, etc., and achieve the effect of reducing area overhead and improving computing efficiency

Active Publication Date: 2021-11-30
ZHEJIANG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, due to their diagonally shaped critical paths, most multiplier hardware circuits (cf. figure 1 in a) and figure 1 almost 75% in b)) are actually ineffective, thus wasting resources and compromising energy efficiency
Such DAS multipliers are even less efficient for quantized CNNs whose weights typically have a smaller bit width than the input, e.g. only 8 bits for 16 or 32 bit inputs
This asymmetry in operands with unequal bit widths makes array-based DAS multipliers not an ideal application

Method used

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  • A Configurable Approximate Multiplier for Quantized Convolutional Neural Networks and Its Implementation
  • A Configurable Approximate Multiplier for Quantized Convolutional Neural Networks and Its Implementation
  • A Configurable Approximate Multiplier for Quantized Convolutional Neural Networks and Its Implementation

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Embodiment Construction

[0034] The present invention will be described in further detail below in conjunction with the accompanying drawings and specific embodiments.

[0035] Such as figure 2 As shown, the present invention proposes a configurable approximate multiplier for quantizing convolutional neural networks, including the following modules:

[0036] (1) Sign extension module: will represent the range in -2 n-2 to 2 n-2 The n-bit signed fixed-point number of -1 is expressed as two n / 2-bit signed fixed-point numbers. When the n-bit signed fixed-point number is non-negative, the n / 2-1 bits from the lowest bit to the top are truncated, and in it 0 is added before the highest bit, and the whole is used as the input of the low bit multiplier, and the other n / 2 bits are used as the input of the high bit multiplier.

[0037] When n=8, the split method is:

[0038] 00XX_XXXX=0XXX_XXX→0XXX_0XXX

[0039] When the n-bit signed fixed-point number is negative, if the decimal value is less than -(2 n...

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Abstract

The invention discloses a configurable approximate multiplier for quantizing a convolutional neural network and an implementation method thereof. The configurable approximate multiplier includes a sign extension module, a sub-multiplier module and an approximate adder; the sign extension module converts the long bit The multiplication of wide signed fixed-point numbers is split into two multiplications of short-width signed fixed-point numbers; the sub-multiplier module includes several sub-multipliers, and each sub-multiplier only receives a signed fixed-point number output from the sign extension module, combined with another One input completes a multiplication of signed fixed-point numbers; the approximate adder combines the output results of the sub-multiplier modules to obtain the final result of multiplication of long-bit-width signed fixed-point numbers. The present invention has obvious speed and energy efficiency improvement for the signed fixed-point multiplication operation of two input bits with unequal lengths; in the quantized convolutional neural network with a large number of multiplication operations, its advantages will be reflected to the greatest extent.

Description

technical field [0001] The invention relates to engineering technical fields such as low power consumption design, approximate calculation, and convolutional neural network, and in particular to a configurable approximate multiplier for quantizing convolutional neural network and an implementation method thereof. Background technique [0002] Deep learning has achieved great success in the past few years due to its accuracy, robustness, and efficiency in various tasks. Deep learning typically employs convolutional neural network (CNN) architectures that can perform millions to billions of multiply and accumulate (MAC) operations per second. Deep learning is much more computationally intensive than traditional machine learning techniques. Therefore, energy efficiency (i.e., energy consumption per operation) has become key to deep learning implementation and deployment, especially for mobile and embedded devices that want to save energy and meet strict power constraints. [...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F7/53G06N3/063
CPCG06F7/53G06N3/063
Inventor 卓成郭楚亮张力
Owner ZHEJIANG UNIV
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