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Low power negative voltage level shifter

A level shifter and negative voltage technology, applied in the direction of reducing power consumption, power reduction of field effect transistors, electrical components, etc., can solve the problems of consuming circuit area and increasing power consumption

Active Publication Date: 2020-03-10
NOVATEK MICROELECTRONICS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The above method needs to be realized by 3 level shifters or a level shifter with 3 circuit stages, which consumes more circuit area. In addition, since this level shifter needs 3 steps of potential shift operation, its Power consumption is also tripled

Method used

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  • Low power negative voltage level shifter
  • Low power negative voltage level shifter
  • Low power negative voltage level shifter

Examples

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Embodiment Construction

[0043] Please refer to figure 2 , figure 2 It is a schematic diagram of a negative voltage level shifter 20 according to an embodiment of the present invention. Such as figure 2 As shown, the negative voltage level shifter 20 includes an input transistor pair M1 and M2, a clamping circuit 200, an output transistor pair M7 and M8, and a switch SW0. figure 2 Also shown are two inverters I1 and I2 , which may be included in the negative voltage level shifter 20 or provided independently of the negative voltage level shifter 20 . The negative voltage level shifter 20 can receive an input signal IN, and correspondingly output an output signal OUT and an inverted output signal OUTB. More specifically, the inverters I1 and I2 operate within a positive voltage domain VCC˜GND, and the negative voltage level shifter 20 can convert the positive voltage domain VCC˜GND into a negative voltage domain GNDA˜NAVDD. In one embodiment, the voltage VCC may be 1.5V, which is a core voltage...

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PUM

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Abstract

The invention discloses a negative voltage level shifter which includes a pair of input transistors, a pair of output transistors and a clamp circuit. The clamp circuit is coupled between the pair ofinput transistors and the pair of output transistors, for clamping source voltages of the pair of input transistors.

Description

technical field [0001] The invention relates to a negative voltage level shifter, in particular to a negative voltage level shifter capable of converting a positive core voltage into a negative output voltage. Background technique [0002] Mixed-mode ICs include digital circuits and analog circuits that operate at different voltage levels, with the digital circuits receiving a lower core supply voltage and the analog circuits receiving a higher or negative voltage level. For example, a digital circuit can receive a power supply voltage of 1.5V and a ground voltage of 0V to operate, most analog circuits operate in the positive voltage domain, which receives a power supply voltage of 6V and a ground voltage of 0V, and other analog circuits operate In the negative voltage domain, it receives a negative supply voltage of -6V and a ground voltage of 0V. If a digital circuit signal is used to control an analog circuit operating in a negative voltage domain, it is necessary to per...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K19/0185H03K19/00
CPCH03K19/0013H03K19/018507H03K19/018521
Inventor 郑彦诚
Owner NOVATEK MICROELECTRONICS CORP
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