FPGA-based accelerated convolution calculation system and convolutional neural network

A convolution and convolutional layer technology, applied in the field of deep learning, can solve the problems of high power consumption and running delay of convolutional neural network models

Active Publication Date: 2020-03-13
INST OF AUTOMATION CHINESE ACAD OF SCI
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Problems solved by technology

[0009] In order to solve the above-mentioned problems in the prior art, that is, in order to solve the problems of high power consumption and running delay of the convolutional neural network model, the first aspect of

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  • FPGA-based accelerated convolution calculation system and convolutional neural network
  • FPGA-based accelerated convolution calculation system and convolutional neural network
  • FPGA-based accelerated convolution calculation system and convolutional neural network

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[0042]In order to make the purpose, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than Full examples. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0043] The application will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain related inventions, rather than to limit the invention. It should also be noted that, for the convenience of description, only the parts related to the related invention ...

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Abstract

The invention belongs to the field of deep learning, particularly relates to an FPGA-based accelerated convolution calculation system and a convolutional neural network, and aims to solve the problemsin the prior art. The system comprises a parameter quantification module for storing fixed-point weight parameters, scales and offsets of each convolution layer; a parameter loading module which is used for loading the fixed-point CNN model parameter file into the FPGA; an input module which is used for acquiring low-bit data after fixed-point processing of the input data; a convolution calculation module which is used for splitting the feature map matrix of the input data into a plurality of small matrixes, sequentially loading the small matrixes into the FPGA and carrying out convolution calculation in batches according to the number of convolution kernels; an output module which is used for combining convolution calculation results corresponding to the small matrixes to serve as an input image of the next layer; according to the system, on the premise that the precision loss of the network model is very small on the hardware FPGA, the storage of the network model is reduced, and the accelerated convolution calculation is realized.

Description

technical field [0001] The invention belongs to the field of deep learning, and in particular relates to an FPGA-based accelerated convolution calculation system and a convolutional neural network. Background technique [0002] The current methods for convolutional neural network compression can be roughly divided into five categories, weight parameter clipping and sharing, low-rank decomposition, model quantization (parameter fixed-point), specific network structure design, and knowledge refinement. [0003] 1. Weight parameter cutting and sharing. The method based on parameter pruning and sharing aims at the redundancy of model parameters and tries to remove redundant and unimportant items. Network pruning and sharing have been used to reduce network complexity and solve overfitting problems. The current trend in this direction of parameter pruning is to prune redundant, non-informative weights in pre-trained CNN models. There are some potential problems with the pruning...

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Application Information

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IPC IPC(8): G06N3/063G06N3/04
CPCG06N3/063G06N3/045
Inventor 尹志刚雷小康
Owner INST OF AUTOMATION CHINESE ACAD OF SCI
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