A method and system for on-orbit reconfiguration of on-board fpga

Abstract

The invention discloses an on-orbit reconstruction method and system for a satellite-borne FPGA, relates to the technical field of on-orbit reconstruction, and can realize high-reliability on-orbit reconstruction of the FPGA. A control FPGA reads pre-stored configuration data from the PROM by default to process FPGA loading and dynamic refreshing. The control FPGA selects to read pre-stored configuration data from the PROM or the FLASH through a loading source switching instruction sent by the on-board management terminal so as to carry out loading and dynamic refreshing on the processed FPGA.The on-board management terminal sends a FLASH reconstruction instruction to the control FPGA, the control FPGA erases FLASH, then the on-board management terminal starts to send a configuration dataframe to the control FPGA, and the control FPGA analyzes the configuration data frame and extracts configuration data in the configuration data frame. The control FPGA receives the configuration dataframe, and performs dual cyclic redundancy check on the configuration data frame. The control FPGA writes the configuration data into the FLASH after successful erasing, and monitors the FLASH programming state in the writing process. The control FPGA reads back the configuration data written into the FLASH, and performs cyclic redundancy check again.

Description

technical field [0001] The invention relates to the technical field of on-orbit reconfiguration, in particular to an on-orbit reconfiguration method and system of a space-borne FPGA. Background technique [0002] The signal processing system with Field Programmable Gate Array (FPGA Field Programmable Gata Array) as the core is widely used in the electronic systems of space vehicles to realize the main logic functions such as signal processing. In order to realize the loading and starting of the FPGA, its configuration file usually needs to be stored in an external memory (usually implemented by an anti-fuse PROM when on-rail). [0003] At present, the usual practice is to burn and solidify the configuration file of the FPGA into the PROM. After curing, the configuration file inside the PROM cannot be changed, resulting in the configuration of the FPGA being completely solidified. If you want to change or upgrade the FPGA program, you need to change or upgrade the The FPGA c...

AI Technical Summary

Problems solved by technology

[0003] At present, the usual practice is to burn and solidify the configuration file of the FPGA into the PROM. After curing, the configuration file inside the PROM cannot be changed, resulting in the configuration of the FPGA being completely solidified. If you want to change or upgrade the FPGA program, you need to change or upgrade the The FPGA configuration file is rewritten into the programmable memory FLASH. The verification of the FPGA configuration file is performed before writing the FLASH. After the FPGA configuration file is written into the FLASH, there is no verification process for the FPGA configuration file. Therefore, this reconstruction technology cannot find errors generated in the process of writing to FLASH, and the reliability is low

[0004] For the on-orbit FPGA, it is necessary to ensure high reliability in order to achieve its on-orbit reconfiguration. Therefore, the above-mentioned existing FPGA program reconfiguration technology cannot realize the reliability of the on-orbit reconfiguration of the on-orbit FPGA.

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