Duty ratio calibration circuit, memory and adjustment method of duty ratio calibration circuit

Abstract

The invention relates to the technical field of integrated circuits, in particular to a duty ratio calibration circuit, a memory and an adjustment method of the duty ratio calibration circuit. The duty ratio calibration circuit comprises a signal adjustment circuit used for receiving and adjusting a first clock signal to generate a second clock signal; the duty ratio detection circuit is connectedwith the signal adjustment circuit and used for detecting the duty ratio of the second clock signal and feeding back a detection result to the signal adjustment circuit, and the duty ratio detectioncircuit comprises an adjustable capacitor; and the process angle detection unit is connected with the adjustable capacitor and is used for detecting a process angle parameter of the memory and adjusting the capacitance value of the adjustable capacitor according to the process angle parameter. According to the scheme, proper capacitance values can be selected according to different process angle parameters, so that the reliability and the accuracy of the duty ratio detection circuit can be improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuits, in particular to a duty ratio calibration circuit, a memory and an adjustment method for the duty ratio calibration circuit. Background technique [0002] In the memory, a duty cycle of 50% can maximize the utilization efficiency of the clock level, thereby ensuring the normal operation of the system and the best performance. However, in actual work, the duty cycle of the clock circuit often deviates from 50%, and the clock duty cycle calibration circuit is a kind of circuit designed for this problem. [0003] At present, in the duty cycle calibration circuit, since the capacitance of the duty cycle detection circuit is fixed during design, different process angle parameters will have different charging and discharging speeds, which will lead to premature failure of the capacitive element in the duty cycle detection circuit. Performing the discharge operation too fast or too late or ...

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Problems solved by technology

[0003] At present, in the duty cycle calibration circuit, since the capacitance of the duty cycle detection circuit is fixed during design, different process angle parameters will have different charging and discharging speeds, which will lead to premature failure of the capacitive element in the duty cycle detection circuit. Performing discharge operation too fast or too late or too slow will reduce the reliability and accuracy of the duty ratio detection circuit and seriously affect the duty ratio detection results, thus failing to meet the duty ratio (50±1)% requirement

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