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Self-aligned vertical solid state devices fabrication and integration methods

A self-aligned, solid-state technology, applied in semiconductor/solid-state device manufacturing, electrical solid-state devices, semiconductor devices, etc., can solve the problem of different thermal expansion coefficients and extremely difficult hermetic sealing of micro-LED substrates and receiver substrates. and other issues to achieve the effect of improving manufacturing productivity

Pending Publication Date: 2020-05-22
VUEREAL INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the alignment between the two substrates (i.e., the wafer substrate and the system substrate) is challenging due to the different sizes (microdevices and contact pads) and thermal expansion coefficients of the two substrates.
Furthermore, it is extremely difficult to develop a bonding method that hermetically seals the micro-LED substrate to the receiver substrate

Method used

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  • Self-aligned vertical solid state devices fabrication and integration methods
  • Self-aligned vertical solid state devices fabrication and integration methods
  • Self-aligned vertical solid state devices fabrication and integration methods

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Embodiment Construction

[0032] Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs.

[0033] As used in this specification and claims, the singular forms "a / an" and "the" include plural referents unless the context clearly dictates otherwise.

[0034] The term "comprising" as used herein is to be understood to mean that the following list is non-exhaustive and may or may not contain any other additional suitable items, such as one or other members, components and / or elements as desired.

[0035] The terms "device", "microdevice", "vertical solid state device" and "optoelectronic device" are used interchangeably herein. It will be apparent to those skilled in the art that the embodiments described herein are independent of device size.

[0036] The terms "system substrate", "receiver substrate" and "backplane" are used interchangeably herein. However, it is clear to t...

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Abstract

The application relates to self-aligned vertical solid state devices fabrication and integration methods. Various embodiments include methods of fabricating an array of self-aligned vertical solid state devices and integrating the devices to a system substrate. The method of fabricating a self-aligned vertical solid state device comprising: providing a semiconductor substrate, depositing a plurality of device layers on the semiconductor substrate, depositing an ohmic contact layer on an upper surface of one of the plurality of device layers, wherein the device layers comprises an active layerand a doped conductive layer, forming a patterned thick conductive layer on the ohmic contact layer; and selectively etching down the doped conductive layer that does not substantially etch the activelayer.

Description

[0001] Cross References to Related Applications [0002] This application claims priority to and benefit of U.S. Provisional Patent Application No. 62 / 767,698, filed November 15, 2018, which is hereby incorporated by reference in its entirety. technical field [0003] The present invention generally relates to vertical solid state devices and methods of manufacturing the same. More specifically, the present invention relates to a method of fabricating a self-aligned vertical solid state device. The invention also relates to the self-aligned integration of an array of microdevices with an array of contacts on a receiver substrate or a system substrate. Background technique [0004] Light emitting diodes (LEDs) and LED arrays can be classified as vertical solid state devices. A microdevice can be a sensor, LED, or any other solid state device grown, deposited, or monolithically fabricated on a substrate. The substrate may be the native substrate of the device layer or a re...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/033
CPCH01L21/0334H01L25/0753H01L2933/0033H01L33/0093H01L25/18H01L25/50H01L27/153H01L33/0075H01L33/06H01L33/24H01L33/32H01L33/42H01L33/44H01L33/46H01L33/62H01L2933/0016H01L2933/0025H01L2933/0066
Inventor 格拉姆雷扎·查济埃桑诺拉·法蒂
Owner VUEREAL INC