Trench gate type semiconductor device and method of producing the same

Abstract

A method of producing a trench gate type MOSFET is provided in which each intersection trench is formed as a two-stage trench structure. A gate trench is backfilled with a mask material and the mask material is then patterned to form a mask used for forming each intersection trench. The intersection trench intersecting the gate trench is provided so as to be deeper than the gate trench. A Schottky electrode is provided in the bottom of each intersection trench 10p. In this manner, there is provided a trench gate type semiconductor device and a method of producing the same, in which: the cell pitch can be reduced even when a wide band gap semiconductor is used as a main semiconductor substrate; good ohmic contacts can be obtained; and an excessive electric field is prevented from being applied to an insulating film in the bottom of each trench.

Description

BACKGROUND[0001]The present invention relates to a semiconductor device having a trench gate structure and a method of producing the same. More specifically, the invention relates to a trench gate type semiconductor device using silicon carbide semiconductor (hereinafter abbreviated to SiC) or Group III nitride semiconductor such as AlGaN semiconductor and a method of producing the same.[0002]When a high withstand voltage power device is produced from silicon carbide semiconductor (hereinafter referred to as SiC) or Group III nitride semiconductor (hereinafter referred to as AlGaN or the like), there is a possibility that on-state-resistance will be remarkably reduced. On-state-resistance of 5 mΩcm2 or lower is obtained by a MISFET of a 1-1.2 kV withstand voltage class using SiC. The on-state-resistance is not higher than that of an IGBT made of a silicon semiconductor (hereinafter referred to as Si) of the same withstand voltage class. There is a possibility that the majority of IG...

AI Technical Summary

Benefits of technology

[0039]As another measure, there is a method disclosed in JP-A-2007-194283 and corresponding US Patent Appln. 2007187695. When this method is applied to the SiC trench gate type MOSFET shown in FIG. 37, an embedding insulator 15 is embedded in a lower portion of each trench 10 while the trench 10 has a depth to reach a drain-side highly doped layer (a field stopping layer 2 in FIG. 68) as shown in FIG. 68. According to this structure, breakdown is avoided because an electric field substantially equal to that applied to the voltage withstanding layer 3 is applied to the embedding insulator 15 based on the electromagnetic law regardless of the relative dielectric constant if the trench 10 can reach the field stopping layer 2.

[0042]As for the function of protecting the insulating film in the bottom of each trench from an excessive electric field as described in JP-A-8-204179, firstly there is provided a structure in which the maximum electric field at off-time is produced near the Schottky electrode, not the insulating film in the bottom of each trench, to prevent the insulating film from being broken down. Secondly the voltage withstanding layer is pinched off by the depletion region extending from the Schottky electrode adjacent at off-time to thereby prevent an excessive electric flux line from reaching the gate trench.

[0045]Although the use of the second function permits a high withstand voltage to be achieved by a thinner voltage withstanding layer and a higher Schottky barrier compared with the first function, there is a possibility that on-state-resistance will increase because the current flow path at on-state is narrowed by the depletion region extending from the Schottky contact, for example, in the same manner as in the case where an embedded region of a conductivity type reserve to the voltage withstanding layer is provided in the bottom of the gate trench as shown in FIG. 67. However, increase in on-state-resistance can be suppressed because the built-in potential of the Schottky contact is lower than that of a pn junction so that the extension of the depletion region at on-state in the Schottky contact is smaller than that in the pn junction.

[0046]In view of the above, the invention further provides a trench gate type semiconductor device and a method of producing the same, for example illustrated in Embodiments 8-10, in which an excessive electric field is prevented from being applied to an insulating film in the bottom of each trench while the second object can be satisfied.

[0066]According to the invention, there can be provided a trench gate type semiconductor device and a method of producing the same, in which the cell pitch can be made smaller than that in the related art even when a semiconductor material not established yet as a mass-production method for impurity doping due to a thermal diffusion method is used. Moreover, there can be provided a trench gate type semiconductor device and a method of producing the same, in which good ohmic contact can be obtained without use of selective epitaxial growth for at least one conductivity type while the first object can be satisfied. In addition, there can be provided a trench gate type semiconductor device and a method of producing the same, in which an excessive electric field is prevented from being applied to an insulating film in the bottom of each trench while the second object can be satisfied.

Problems solved by technology

It is however difficult to protect the side wall because the width of the trench 10 is, for example, no more than 0.6 μm.

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