Method and system for discarding repeated frames of high-availability seamless redundant ring network
A high-availability, redundant ring network technology, applied in the transmission system, digital transmission system, data exchange network, etc., can solve the problems of inaccurate judgment of repeated frames and low efficiency of repeated frame judgment
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Embodiment 1
[0062] see figure 1 , figure 1 It is a schematic flowchart of a method for discarding repeated frames in a high-availability seamless redundant ring network provided by an embodiment of the present application. Depend on figure 1 It can be seen that, in this embodiment, the method for discarding repeated frames in a high-availability seamless redundant ring network includes the following process:
[0063] S1: Obtain two channels of Ethernet data.
[0064] The Ethernet data in this embodiment are respectively sent to Ethernet Mac0 and Ethernet Mac1 through two network cards.
[0065] For the network topology diagram of the repeated frame discarding judgment in this embodiment, please refer to figure 2 , figure 2 The A-frame and B-frame are the same two data frames. When the link in one direction is abnormal, the data can still be transmitted to the destination node through the link in the other direction, which improves the redundancy. In order to prevent the destinatio...
Embodiment 2
[0089] exist Figure 1-Figure 4 On the basis of the illustrated embodiment see Figure 5 , Figure 5 It is a schematic structural diagram of a system for discarding repeated frames in a high-availability seamless redundant ring network provided by an embodiment of the present application. Depend on Figure 5 It can be seen that the high-availability seamless redundant ring network repeated frame discarding system in this embodiment mainly includes: two network ports, two first data cache modules, multiplexing module, repeated frame discarding module and second data cache module . Any network port matches a first data cache module, and the second cache module is connected to the CPU via a PCIe interface.
[0090] The system is set on an FPGA chip, and two network ports are used to obtain two channels of Ethernet data. The two first data cache modules are used to respectively cache the two channels of Ethernet data and transmit them to the multiplexing module. The multiple...
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