Data processing device and method

Abstract

The invention relates to a data processing device and method. The device comprises a plurality of cascaded processing chips, each processing chip comprises a plurality of groups of processing units and a time delay unit, the plurality of groups of processing units carries out data processing at a reference frequency, and the time delay unit comprises a plurality of time delayers which are connected in series. Any one of the plurality of processing chips is configured as follows: a first clock signal corresponding to the reference frequency is controlled to pass through different numbers of delayers to generate a second clock signal corresponding to each group of processing units, and the phases of the second clock signals corresponding to each group of processing units are different; and according to the second clock signals, each group of processing units is controlled to respectively carry out data processing to obtain a processing result. According to the embodiment of the invention, clock signals with different phases can be configured for multiple groups of processing units of the processing chip, so that each group of processing units is prevented from operating according tothe same clock, and the IP voltage drop of the whole device is stabilized.

Description

technical field [0001] The present disclosure relates to the field of electronic technology, and in particular to a data processing device and method. Background technique [0002] IR drop (IR_Drop) refers to a phenomenon in which the voltage drops or rises on the power and ground networks in integrated circuits. With the continuous development of electronic technology, the width of the metal interconnection in the semiconductor process becomes narrower and narrower, resulting in an increase in the resistance value of the metal interconnection. According to Ohm's law, there will be a certain IR drop across the chip. In the system-on-a-chip (SoC) design, if the logic gate unit connected to the metal interconnection line flips at the same time, that is, there is a strong current, it will cause a large IR_Drop, and finally add it to the standard cell (cell) The voltage of the chip will drop, which will directly affect the performance, function and power consumption of the chi...

AI Technical Summary

Problems solved by technology

In the system-on-a-chip (SoC) design, if the logic gate unit connected to the metal interconnection line flips at the same time, that is, there is a strong current, it will cause a large IR_Drop, and finally add it to the standard cell (cell) The voltage of the chip will drop, which will directly affect the performance, function, power consumption, etc. of the chip.

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